Publications

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Displaying 1626-1650 of 1700 result(s).

T. Niculiu, S.D. Cotofana, Hierarchical intelligent simulation (June 2001), 15th European Simulation Multiconference (ESM 2001), 6-9 June 2001, Prague, Czech Republic [Conference Paper]

A.G.M. Cilio, H. Corporaal, Code Positioning for VLIW Architectures (June 2001), 9th International Conference and Exibition on High-Performance Computing and Networking (HPCN Europe 2001), 25-27 June 2001, Amsterdam, The Netherlands [Conference Paper]

S. Vassiliadis, S. Wong, S.D. Cotofana, Network Processors: Issues and Prospectives (June 2001), International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA 2001), 25-28 June 2001, Las Vegas, USA [Conference Paper]

C. Feige, M.J. Geuzebroek, Logic BIST Technology Evaluation: an Industrial Case Study (May 2001), IEEE European Test Workshop (ETW 2001), 29 May - 1 June 2001, Stockholm, Sweden [Conference Paper]

H. Gautama, A.J.C. van Gemund, On the Use of Alternating Renewal Processes in Static Branch Prediction (May 2001), 7th Annual Conference of the Advanced School for Computing and Imaging (ASCI 2001), 30 May - 1 June 2001, Heijen, The Netherlands [Conference Paper]

T. Niculiu, S.D. Cotofana, Multi-hierarchical learning-based co-simulation (May 2001), IASTED International Conference on Modelling and Simulation (MS 2001), 16-18 May 2001, Pittsburg, USA [Conference Paper]

E. Ogston, S. Vassiliadis, Matchmaking among minimal agents without a facilitator (May 2001), 5th International Conference on Autonomous Agents, 28 May - 1 June 2001, Montreal, Canada [Conference Paper]

S.D. Cotofana, S. Wong, S. Vassiliadis, Embedded Processors: Characteristics and Trends (May 2001), 7th Annual Conference of the Advanced School for Computing and Imaging (ASCI 2001), 30 May - 1 June 2001, Heijen, The Netherlands [Conference Paper]

E. Moscu Panainte, I. Athanasiu, S.D. Cotofana, An Optimization Framework for Retargetable Compilers (May 2001), 13th International Conference on Control Systems and Computer Sciences (CSCS 2001), May 2001, Bucharest, Romania [Conference Paper]

I.J.G.M. Janssen, Enhancing the Move Framework - Endianness port and Immediates handling (May 2001), [Msc Thesis]

T.D. Hamalainen, M. Hannikainen, P. Hamalainen, H. Corporaal, J. Saarinen, Implementation of encryption algorithms on transport triggered architectures (May 2001), International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sidney, Australia [Conference Paper]

C.R. Lageweg, S.D. Cotofana, S. Vassiliadis, A linear threshold gate implementation in single electron technology (April 2001), IEEE Computer Society Workshop on VLSI (WVLSI 2001), 19-20 April 2001, Orlando, USA [Conference Paper]

A.J.C. van Gemund, H. Gautama, Trade-offs in Symbolic Cost Estimation of Parallel Programs (April 2001), European Joint Conference on Theory and Practice of Software (ETAPS 2001), 2-6 April 2001, Genova, Italy [Conference Paper]

M. Sima, S.D. Cotofana, J.T.J. van Eijndhoven, S. Vassiliadis, K.A. Vissers, An 8x8 IDCT Implementation on an FPGA-augmented TriMedia (April 2001), 9th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2001), 29 April - 2 May 2001, Rohnert Park, USA [Conference Paper]

M. Arnold, H. Corporaal, Designing domain-specific processors (April 2001), 9th International Sympsium on Hardware/Software Codesign (CODES 2001), 25-27 April 2001, Copenhagen, Denmark [Conference Paper]

S. Hamdioui, Testing Multi-Port Memories: Theory and Practice (April 2001), , Outstanding Dissertation Award [Phd Thesis]

Z. Al-Ars, A.J. van de Goor, Static and dynamic behavior of memory cell array opens and shorts in embedded DRAMs (March 2001), Conference on Design, Automation and Test in Europe (DATE 2001), 12-16 March 2001, Munich, Germany [Conference Paper]

K.L.M. Bertels, L. Neuberg, S. Vassiliadis, G.G. Pechanek, On chaos and neural networks: the backpropagation paradigm (March 2001), Artificial Intelligence Review, volume 15, issue 1-2 [Journal Paper]

G.L. Reijns, A.J.C. van Gemund, H. Gautama, Performance analysis of multi-stage interconnection networks with deterministic service times (March 2001), Parallel Processing Letters (PPL), volume 11, issue 1 [Journal Paper]

S. Vassiliadis, C.J. Glossner, P.G. D'Arcy, S. Jinturkar, Compiler controlled dynamic scheduling of program instructions (February 2001), filed in Europe [Patent]

S. Wong, S.D. Cotofana, S. Vassiliadis, Coarse Reconfigurable Multimedia Unit Extension (February 2001), 9th Euromicro Workshop on Parallel and Distributed Processing (PDP 2001), 7-9 February 2001, Mantova, Italy [Conference Paper]

K.L.M. Bertels, M. Boman, Agent-Based Social Simulation in Markets (February 2001), Electronic Commerce Research (ECR), volume 1, issue 1-2 [Journal Paper]

Z. Al-Ars, A.J. van de Goor, J. Braun, B. Gauch, D. Richter, W. Spirkl, Development of a DRAM simulation model for fault analysis purposes (February 2001), 13th Workshop on Testmethods and Reliability of Circuits and Systems, 18–20 February 2001, Miesbach, Germany [Conference Paper]

M. Arnold, Instruction set extension for embedded processors (January 2001), [Phd Thesis]

A. Radulescu, Compile-time scheduling for distributed-memory systems (January 2001), [Phd Thesis]

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