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Type Year Author Title
Displaying 1626-1650 of 1695 result(s).
T. Niculiu, S.D. Cotofana, Multi-hierarchical learning-based co-simulation 1196_multihierarchical_learningbased_cosimulation.pdf (May 2001), IASTED International Conference on Modelling and Simulation (MS 2001), 16-18 May 2001, Pittsburg, USA [Conference Paper]
E. Ogston, S. Vassiliadis, Matchmaking among minimal agents without a facilitator 1197_matchmaking_among_minimal_agents_without_a_facilitator.pdf (May 2001), 5th International Conference on Autonomous Agents, 28 May - 1 June 2001, Montreal, Canada [Conference Paper]
S.D. Cotofana, S. Wong, S. Vassiliadis, Embedded Processors: Characteristics and Trends 1198_embedded_processors_characteristics_and_trends.pdf (May 2001), 7th Annual Conference of the Advanced School for Computing and Imaging (ASCI 2001), 30 May - 1 June 2001, Heijen, The Netherlands [Conference Paper]
E. Moscu Panainte, I. Athanasiu, S.D. Cotofana, An Optimization Framework for Retargetable Compilers (May 2001), 13th International Conference on Control Systems and Computer Sciences (CSCS 2001), May 2001, Bucharest, Romania [Conference Paper]
T.D. Hamalainen, M. Hannikainen, P. Hamalainen, H. Corporaal, J. Saarinen, Implementation of encryption algorithms on transport triggered architectures 1201_implementation_of_encryption_algorithms_on_transport_trigge.pdf (May 2001), International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sidney, Australia [Conference Paper]
C.R. Lageweg, S.D. Cotofana, S. Vassiliadis, A linear threshold gate implementation in single electron technology 1202_a_linear_threshold_gate_implementation_in_single_electron_t.pdf (April 2001), IEEE Computer Society Workshop on VLSI (WVLSI 2001), 19-20 April 2001, Orlando, USA [Conference Paper]
A.J.C. van Gemund, H. Gautama, Trade-offs in Symbolic Cost Estimation of Parallel Programs (April 2001), European Joint Conference on Theory and Practice of Software (ETAPS 2001), 2-6 April 2001, Genova, Italy [Conference Paper]
M. Sima, S.D. Cotofana, J.T.J. van Eijndhoven, S. Vassiliadis, K.A. Vissers, An 8x8 IDCT Implementation on an FPGA-augmented TriMedia 1204_an_8x8_idct_implementation_on_an_fpgaaugmented_trimedia.pdf (April 2001), 9th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2001), 29 April - 2 May 2001, Rohnert Park, USA [Conference Paper]
M. Arnold, H. Corporaal, Designing domain-specific processors (April 2001), 9th International Sympsium on Hardware/Software Codesign (CODES 2001), 25-27 April 2001, Copenhagen, Denmark [Conference Paper]
S. Hamdioui, Testing Multi-Port Memories: Theory and Practice 1235_testing_multiport_memories_theory_and_practice.pdf (April 2001), , Outstanding Dissertation Award [Phd Thesis]
Z. Al-Ars, A.J. van de Goor, Static and dynamic behavior of memory cell array opens and shorts in embedded DRAMs 1206_static_and_dynamic_behavior_of_memory_cell_array_opens_and.pdf (March 2001), Conference on Design, Automation and Test in Europe (DATE 2001), 12-16 March 2001, Munich, Germany [Conference Paper]
K.L.M. Bertels, L. Neuberg, S. Vassiliadis, G.G. Pechanek, On chaos and neural networks: the backpropagation paradigm 1238_on_chaos_and_neural_networks_the_backpropagation_paradigm.pdf (March 2001), Artificial Intelligence Review, volume 15, issue 1-2 [Journal Paper]
G.L. Reijns, A.J.C. van Gemund, H. Gautama, Performance analysis of multi-stage interconnection networks with deterministic service times 1239_performance_analysis_of_multistage_interconnection_network.pdf (March 2001), Parallel Processing Letters (PPL), volume 11, issue 1 [Journal Paper]
S. Wong, S.D. Cotofana, S. Vassiliadis, Coarse Reconfigurable Multimedia Unit Extension 1208_coarse_reconfigurable_multimedia_unit_extension.pdf (February 2001), 9th Euromicro Workshop on Parallel and Distributed Processing (PDP 2001), 7-9 February 2001, Mantova, Italy [Conference Paper]
K.L.M. Bertels, M. Boman, Agent-Based Social Simulation in Markets (February 2001), Electronic Commerce Research (ECR), volume 1, issue 1-2 [Journal Paper]
Z. Al-Ars, A.J. van de Goor, J. Braun, B. Gauch, D. Richter, W. Spirkl, Development of a DRAM simulation model for fault analysis purposes 1210_development_of_a_dram_simulation_model_for_fault_analysis_p.pdf (February 2001), 13th Workshop on Testmethods and Reliability of Circuits and Systems, 18–20 February 2001, Miesbach, Germany [Conference Paper]
S. Vassiliadis, S. Wong, S.D. Cotofana, The MOLEN pu-coded Processor 1240_the_molen_pucoded_processor.pdf (January 2001), CE technical report [Technical Report]
S. Hamdioui, A.J. van de Goor, An experimental analysis of spot defects in SRAMs: realistic fault models and test 1275_an_experimental_analysis_of_spot_defects_in_srams_realisti.pdf (December 2000), 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan [Conference Paper]
Z. Al-Ars, A.J. van de Goor, Impact of memory cell array bridges on the faulty behavior in embedded DRAMs 1276_impact_of_memory_cell_array_bridges_on_the_faulty_behavior.pdf (December 2000), 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan [Conference Paper]
S. Vassiliadis, M. Zhang, Elementary function generators for neural-network emulators (November 2000), IEEE Transactions on Neural Networks (TNN), volume 11, issue 6 [Journal Paper]
T. Niculiu, S.D. Cotofana, A. Manolescu, Hierarchical approach for hardware/software systems 1280_hierarchical_approach_for_hardwaresoftware_systems.pdf (October 2000), 23rd International Semicondutor Conference (CAS 2000), 10-14 October 2000, Sinaia, Romania [Conference Paper]