Publications

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Type Year Author Title
Displaying 1501-1525 of 1625 result(s).
S. Hamdioui, A.J. van de Goor, Thorough Tesing Any Multi-Port Memory with Linear Tests (February 2002), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), volume 21, issue 2 [Journal Paper]
L. Neuberg, K.L.M. Bertels, An artificial Stock Market 1159_an_artificial_stock_market.pdf (February 2002), IASTED International Conference on Applied Informatics (IA 2002), 18–21 February 2002, Innsbruck, Austria [Conference Paper]
A.J. van de Goor, I. Schanstra, Address and data scrambling: causes and impact on memory tests 1162_address_and_data_scrambling_causes_and_impact_on_memory_te.pdf (January 2002), 1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2002), 29-31 January 200, Christchurch, New Zealand [Conference Paper]
S. Hamdioui, Z. Al-Ars, A.J. van de Goor, Testing static and dynamic faults in random access memories 1167_testing_static_and_dynamic_faults_in_random_access_memories.pdf (January 2002), 20th IEEE VLSI Test Symposium (VTS 2002), 28 April - 2 May 2002, Monterey, USA [Conference Paper]
A. van Gog, Elwave Online (January 2002), [Msc Thesis]
C.J. Glossner, The Delft-JAVA engine 1211_the_delftjava_engine.pdf (November 2001), [Phd Thesis]
C.R. Lageweg, S.D. Cotofana, S. Vassiliadis, A turnstile based single electron memory element 1212_a_turnstile_based_single_electron_memory_element.pdf (November 2001), 4th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors (SAFE 2001), 28-30 November 2001, Veldhoven, The Netherlands [Conference Paper]
C.R. Lageweg, S.D. Cotofana, S. Vassiliadis, Single electron encoded logic circuits 1213_single_electron_encoded_logic_circuits.pdf (November 2001), 4th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors (SAFE 2001), 28-30 November 2001, Veldhoven, The Netherlands [Conference Paper]
M. Klaus, A.J. van de Goor, Tests for resistive and capacitive defects in address decoders (November 2001), 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan [Conference Paper]
G.K. Kuzmanov, S. Vassiliadis, J.T.J. van Eijndhoven, A padding processor for MPEG-4 (November 2001), 12th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2001), 29-30 November 2001, Veldhoven, The Netherlands [Conference Paper]
G.K. Kuzmanov, S. Vassiliadis, J.T.J. van Eijndhoven, An implementation of the MPEG-4 ACQ function (November 2001), 12th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2001), 29-30 November 2001, Veldhoven, The Netherlands [Conference Paper]
S. Hamdioui, A.J. van de Goor, D. Eastwick, M. Rodgers, Detecting unique faults in multi-port SRAMs 1217_detecting_unique_faults_in_multiport_srams.pdf (November 2001), 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan [Conference Paper]
M. Sima, S.D. Cotofana, S. Vassiliadis, J.T.J. van Eijndhoven, Variable-Length Decoder Implemented on a TriMedia/CPU64 Reconfigurable Functional Unit 1218_variablelength_decoder_implemented_on_a_trimediacpu64_rec.pdf (November 2001), 12th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2001), 29-30 November 2001, Veldhoven, The Netherlands [Conference Paper]
P.T. Stathis, S. Vassiliadis, S.D. Cotofana, Transposition Mechanism for sparse matrices on vector processors 1219_transposition_mechanism_for_sparse_matrices_on_vector_proce.pdf (November 2001), 12th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2001), 29-30 November 2001, Veldhoven, The Netherlands [Conference Paper]
P.T. Stathis, S.D. Cotofana, S. Vassiliadis, Sparse Matrix Vector Multiplication Evaluation Using the BBCS scheme 1220_sparse_matrix_vector_multiplication_evaluation_using_the_bb.pdf (November 2001), 8th Panhellenic Conference on Informatics , 8-10 November 2001, Nicosia, Cyprus [Conference Paper]
S. Wong, S. Vassiliadis, S.D. Cotofana, SAD Implementation in FPGA Hardware 1221_sad_implementation_in_fpga_hardware.pdf (November 2001), 12th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2001), 29-30 November 2001, Veldhoven, The Netherlands [Conference Paper]
D. Crisu, S.D. Cotofana, S. Vassiliadis, An energy-aware architectural exploration tool for ARM-based SOCs 1222_an_energyaware_architectural_exploration_tool_for_armbase.pdf (November 2001), 12th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2001), 29-30 November 2001, Veldhoven, The Netherlands [Conference Paper]
S.N. Demidenko, A.J. van de Goor, S. Henderson, P. Knoppers, Simulation and development of short transparent tests for RAM 1223_simulation_and_development_of_short_transparent_tests_for_r.pdf (November 2001), 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan [Conference Paper]
Z. Al-Ars, A.J. van de Goor, J. Braun, D. Richter, A memory specific notation for fault modeling 1225_a_memory_specific_notation_for_fault_modeling.pdf (November 2001), 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan [Conference Paper]
I. Antochi, B.H.H. Juurlink, A.G.M. Cilio, A low-cost, power-efficient texture cache architecture 1226_a_lowcost_powerefficient_texture_cache_architecture.pdf (November 2001), 12th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2001), 29-30 November 2001, Veldhoven, The Netherlands [Conference Paper]
C.R. Lageweg, S.D. Cotofana, S. Vassiliadis, Achieving fanout capabilities in single electron encoded logic networks 1227_achieving_fanout_capabilities_in_single_electron_encoded_lo.pdf (October 2001), 6th International Conference on Solid-State and Integrated Circuit Technology (ICSICT 2001), 22-25 October 2001, Shanghai, China [Conference Paper]
C.R. Lageweg, S.D. Cotofana, S. Vassiliadis, Digital to analog conversion performed in single electron technology 1228_digital_to_analog_conversion_performed_in_single_electron_t.pdf (October 2001), 1st IEEE Conference on Nanotechnology (IEEE-NANO 2001), 28-30 October 2001, Maui, USA [Conference Paper]