Publications

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Displaying 1651-1675 of 1700 result(s).

S. Vassiliadis, S. Wong, S.D. Cotofana, The MOLEN pu-coded Processor (January 2001), CE technical report [Technical Report]

S. Hamdioui, A.J. van de Goor, An experimental analysis of spot defects in SRAMs: realistic fault models and test (December 2000), 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan [Conference Paper]

Z. Al-Ars, A.J. van de Goor, Impact of memory cell array bridges on the faulty behavior in embedded DRAMs (December 2000), 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan [Conference Paper]

S. Vassiliadis, M. Zhang, Elementary function generators for neural-network emulators (November 2000), IEEE Transactions on Neural Networks (TNN), volume 11, issue 6 [Journal Paper]

T. Niculiu, S.D. Cotofana, A. Manolescu, Hierarchical approach for hardware/software systems (October 2000), 23rd International Semicondutor Conference (CAS 2000), 10-14 October 2000, Sinaia, Romania [Conference Paper]

G.G. Pechanek, L.D. Larsen, C.J. Glossner, S. Vassiliadis, Distributed processing array with component processors performing customized interpretation of instructions (October 2000), filed in USA [Patent]

M. Sima, S. Vassiliadis, S.D. Cotofana, J.T.J. van Eijndhoven, K.A. Vissers, 1st Workshop on Embedded Systems (October 2000), 1st Workshop on Embedded Systems (PROGRESS 2000), 13 October 2000, Utrecht, The Netherlands [Conference Paper]

F.J. Gutierrez, E. Varvarigos, S. Vassiliadis, Multi-cost routing in Max-Min fair share networks (October 2000), 38th Annual Allerton Conference on Communications, Control, and Computing, 4-6 October 2000, Monticello, USA [Conference Paper]

A.D. Pimentel, P. van der Wolf, E.F. Deprettere, L.O. Hertzberger, J.T.J. van Eijndhoven, S. Vassiliadis, The Artemis Architecture Workbench (October 2000), 1st Workshop on Embedded Systems (PROGRESS 2000), 13 October 2000, Utrecht, The Netherlands [Conference Paper]

S. Hamdioui, A.J. van de Goor, Testing address decoder faults in two-port memories: fault models, test, consequences of port restrictions, and test strategy (October 2000), Journal of Electronic Testing: Theory and Applications (JETTA), volume 16, issue 5 [Journal Paper]

H.E. Bal, A.J.C. van Gemund, A. Radulescu, The distributed ASCI supercomputer project (October 2000), ACM SIGOPS Operating Systems Review, volume 34, issue 4 [Journal Paper]

M.J. Geuzebroek, J. van der Linden, A.J. van de Goor, Test Point Insertion for Compact Test Sets (October 2000), IEEE International Test Conference (ITC 2000), 3-5 October 2000, Atlantic City, USA [Conference Paper]

A.J. van de Goor, A. Paalvast, Industrial Evaluation of DRAM SIMM Tests (October 2000), IEEE International Test Conference (ITC 2000), 3-5 October 2000, Atlantic City, USA , Top Ten Best Papers Awards [Conference Paper]

H. Gautama, A.J.C. van Gemund, Static Performance Prediction of Data-Dependent Programs (September 2000), 2nd International Workshop on Software and Performance (WOSP 2000), 17-20 September 2000, Ottawa, Canada [Conference Paper]

A. Gonzalez Escribano, A.J.C. van Gemund, V. Cardenoso Payo, Measuring the Performance Impact of SP-restricted Programming on Distributed-Memory Machines (September 2000), Perspectivas des Paralelismo en Computadores, 11-13 September 2000, Granada, Spain [Conference Paper]

S. Vassiliadis, B.H.H. Juurlink, E.A. Hakkennes, Complex streamed instructions: introduction and initial evaluation (September 2000), 26th EUROMICRO 2000 Conference, Informatics: Inventing the Future (EUROMICRO 2000), 5-7 September 2000, Maastricht, The Netherlands [Conference Paper]

G.G. Pechanek, S. Vassiliadis, The ManArray embedded processor architecture (September 2000), 26th EUROMICRO 2000 Conference, Informatics: Inventing the Future (EUROMICRO 2000), 5-7 September 2000, Maastricht, The Netherlands [Conference Paper]

S.D. Cotofana, B.H.H. Juurlink, S. Vassiliadis, Counter Based Superscalar Instruction Issuing (September 2000), 26th EUROMICRO 2000 Conference, Informatics: Inventing the Future (EUROMICRO 2000), 5-7 September 2000, Maastricht, The Netherlands [Conference Paper]

N.P. Roest, MIPhS, A Configurable Hardware Simulator (September 2000), [Msc Thesis]

R. Manniesing, I. Karkowski, H. Corporaal, Automatic SIMD parallelization of embedded applications based on pattern recognition (August 2000), 6th International Euro-Par Conference on Parallel Processing (Euro-Par 2000), 29 August - 1 September 2000, Munich, Germany [Conference Paper]

K.L.M. Bertels, L. Neuberg, S. Vassiliadis, G.G. Pechanek, A Look Inside the Learning Process of Neural Networks (August 2000), Complexity, volume 5, issue 6 [Journal Paper]

S. Hamdioui, A.J. van de Goor, M. Rodgers, D. Eastwick, March tests for realistic faults in two-port memories (August 2000), 8th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2000), 7-8 August 2000, San Jose, USA [Conference Paper]

H.J.M. Schot, H. Corporaal, Automated design of an ASIP for image processing applications (August 2000), 6th International Euro-Par Conference on Parallel Processing (Euro-Par 2000), 29 August - 1 September 2000, Munich, Germany [Conference Paper]

M. Stanca, H. Corporaal, S.D. Cotofana, S. Vassiliadis, Hashed Addressed Caches for Embedded Pointer Based Codes (August 2000), 6th International Euro-Par Conference on Parallel Processing (Euro-Par 2000), 29 August - 1 September 2000, Munich, Germany [Conference Paper]

S. Vassiliadis, S.D. Cotofana, P.T. Stathis, BBCS based sparse matrix-vector multiplication: initial evaluation (August 2000), 16th IMACS World Congress on Scientific Computation, Applied Mathematics and Simulation (IMACS 2000), 21-25 August 2000, Lausanne, Switzerland [Conference Paper]

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