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N.Z.B. Haron

NameN.Z.B. Haron
First NameNor Zaidi
E-mail
Author TypePhd Student
AffiliationTU Delft

Publications

S. Hamdioui, M. Taouil, N.Z.B. Haron, Testing Open Defects in Memristor-Based Memories 1409_testing_open_defects_in_memristorbased_memories.pdf (January 2015), IEEE Transactions on Computers (TC), volume 64, issue 1 [Journal Paper]
N.Z.B. Haron, S. Hamdioui, DfT Schemes for Resistive Open Defects in RRAMs 131_dft_schemes_for_resistive_open_defects_in_rrams.pdf (March 2012), Design, Automation & Test in Europe Conference & Exhibition (DATE 2012), 12-16 March 2012, Dresden, Germany [Conference Paper]
N.Z.B. Haron, S. Hamdioui, On Defect Oriented Testing for Hybrid CMOS/memristor Memory 98_on_defect_oriented_testing_for_hybrid_cmosmemristor_memory.pdf (November 2011), 20th Asian Test Symposium (ATS 2011), 20-23 November 2011, New Delhi, India [Conference Paper]
M.S. Khan, S. Hamdioui, N.Z.B. Haron, F. Catthoor, NBTI Monitoring and Design for Reliability in Nanoscale Circuits 106_nbti_monitoring_and_design_for_reliability_in_nanoscale_circ.pdf (October 2011), IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2011), 3-5 October 2011, Vancouver, Canada [Conference Paper]
N.Z.B. Haron, S. Hamdioui, Cost-Efficient Fault-Tolerant Decoder for Hybrid Nanoelectronic Memories 77_costefficient_faulttolerant_decoder_for_hybrid_nanoelectron.pdf (March 2011), Design, Automation and Test in Europe (DATE 2011), 14-18 March 2011, Grenoble, France [Conference Paper]
N.Z.B. Haron, S. Hamdioui, On Correcting Cluster Errors in Nanoelectronic Memories 117_on_correcting_cluster_errors_in_nanoelectronic_memories.pdf (January 2011), 3rd HiPEAC Workshop on Design for Reliability (DFR 2011), 23 January 2011, Heraklion, Greece [Conference Paper]
N.Z.B. Haron, S. Hamdioui, Redundant Residue Number System Code for Fault-Tolerant Hybrid Memories 113_redundant_residue_number_system_code_for_faulttolerant_hybr.pdf (January 2011), ACM Journal on Emerging Technologies in Computing Systems (JETC), volume 7, issue 1 , article 4 [Journal Paper]
N.Z.B. Haron, S. Hamdioui, Z. Ahyadi, ECC Design for Fault-Tolerant Crossbar Memories: A Case Study 235_ecc_design_for_faulttolerant_crossbar_memories_a_case_stud.pdf (December 2010), 5th IEEE International Design and Test Workshop (IDT 2010), 14-15 December 2010, Abu Dhabi, UAE [Conference Paper]
N.Z.B. Haron, S. Hamdioui, High-Performance Cluster-Fault Tolerance Scheme for Hybrid Nanoelectronic Memories 261_highperformance_clusterfault_tolerance_scheme_for_hybrid_n.pdf (October 2010), 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2010), 6-8 October 2010, Kyoto, Japan [Conference Paper]
N.Z.B. Haron, S. Hamdioui, Mitigating Defective CMOS to Non-CMOS Vias in CMOS/Molecular Memories 156_mitigating_defective_cmos_to_noncmos_vias_in_cmosmolecular.pdf (August 2010), 10th IEEE International Conference on Nanotechnology (NANO 2010), August 2010, Seoul, Korea , Certificate of Merit [Conference Paper]
N.Z.B. Haron, S. Hamdioui, Using RRNS Codes for Cluster Faults Tolerance in Hybrid Memories 401_using_rrns_codes_for_cluster_faults_tolerance_in_hybrid_memo.pdf (October 2009), 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2009), 7-9 October 2009, Chicago, USA [Conference Paper]
N.Z.B. Haron, S. Hamdioui, Residue-Based Code for Reliable Hybrid Memories 309_residuebased_code_for_reliable_hybrid_memories.pdf (July 2009), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2009), 30-31 July 2009, San Fransisco, USA [Conference Paper]
N.Z.B. Haron, S. Hamdioui, Fault Tolerance Architecture for Reliable Hybrid CMOS/Nanodevice Memories 345_fault_tolerance_architecture_for_reliable_hybrid_cmosnanode.pdf (May 2009), 14th IEEE European Test Symposium (ETS 2009), 25-29 May 2009, Sevilla, Spain [Conference Paper]
N.Z.B. Haron, S. Hamdioui, S.D. Cotofana, Emerging Non-CMOS Nanoelectronic Devices - What Are They? 412_emerging_noncmos_nanoelectronic_devices__what_are_they.pdf (January 2009), 4th IEEE International Conference of Nano/Micro Engineered & Molecular Systems (IEEE-NEMS 2009), 5-8 January 2009, Shenzhen, China [Conference Paper]
N.Z.B. Haron, S. Hamdioui, Why is CMOS scaling coming to an END? 510_why_is_cmos_scaling_coming_to_an_end.pdf (December 2008), 3rd IEEE International Design and Test Workshop (IDT 2008), 20-22 December 2008, Monastir, Tunisia [Conference Paper]
M.S. Khan, S. Hamdioui, N.Z.B. Haron, CMOS scaling impacts on Reliability, What do we understand? 529_cmos_scaling_impacts_on_reliability_what_do_we_understand.pdf (November 2008), 19th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2008), 27-28 November 2008, Veldhoven, The Netherlands [Conference Paper]
N.Z.B. Haron, S. Hamdioui, Emerging Crossbar-based Hybrid Nanoarchitectures for Future Computing Systems 527_emerging_crossbarbased_hybrid_nanoarchitectures_for_future.pdf (November 2008), IEEE International Conference on Signals, Circuits and Systems (SCS 2008), 7-9 November 2008, Hammamet, Tunisia [Conference Paper]