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Type Year Author Title
Displaying 51-75 of 1700 result(s).
E. I. Vatajelu, P. Pouyan, S. Hamdioui, State of the art and challenges for test and reliability of emerging nonvolatile resistive memories (October 2017), International Journal of Circuit Theory and Applications [Journal Paper]
J. Fang, J Lee, P. Hofstee, J. Hidders, Analyzing In-Memory Hash Joins: Granularity Matters 1639_analyzing_inmemory_hash_joins_granularity_matters.pdf (September 2017), 8th International Workshop on Accelerating Analytics and Data Management Systems Using Modern Processor and Storage Architectures (ADMS 2017), 1 September 2017, Munich, Germany [Conference Paper]
M. Lefter, G.R. Voicu, T. Marconi, V. Savin, S.D. Cotofana, LDPC-Based Adaptive Multi-Error Correction for 3D Memories 1641_ldpcbased_adaptive_multierror_correction_for_3d_memories.pdf (September 2017), 35th IEEE International Conference on Computer Design (ICCD 2017), 5-8 November 2017, Boston, USA [Conference Paper]
N. Cucu Laurenciu, S.D. Cotofana, Haar-based Interconnect Coding for Energy Effective Medium/Long Range Data Transport 1643_haarbased_interconnect_coding_for_energy_effective_medium.pdf (September 2017), 30th IEEE International System-on-Chip Conference (SOCC 2017), 5-8 September 2017, Munich, Germany [Conference Paper]
H. Mushtaq, Z. Al-Ars, P. Hofstee, SparkGA: A Spark Framework for Cost Effective, Fast and Accurate DNA Analysis at Scale 1619_sparkga_a_spark_framework_for_cost_effective_fast_and_acc.pdf (August 2017), 8th ACM Conference on Bioinformatics, Computational Biology and Health Informatics (ACM-BCB 2017), 20-23 August 2017, Boston, USA [Conference Paper]
J.J. Hoozemans, J. van Straten, S. Wong, Using a Polymorphic VLIW Processor to Improve Schedulability and Performance for Mixed-criticality Systems 1629_using_a_polymorphic_vliw_processor_to_improve_schedulabilit.pdf (August 2017), 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2017), 16-18 August 2017, Hsinchu, Taiwan [Conference Paper]
L. Xie, H.A. Du Nguyen, J. Yu, A. Kaichouhi, M. Taouil, S. Hamdioui, Scouting Logic: A Novel Memristor-Based Logic Design for Resistive Computing (July 2017), IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2017), 3-5 July 2017, Bochum, Germany [Conference Proceedings]
Y. Ma, G Smaragdos, Z. Al-Ars, C. Strydis, Towards Real-Time Whisker Tracking in Rodents for Studying Sensorimotor Disorders 1626_towards_realtime_whisker_tracking_in_rodents_for_studying.pdf (July 2017), International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVII (2017)), 17-20 July 2017, Samos, Greece [Conference Paper]
M. Lefter, T. Marconi, G.R. Voicu, S.D. Cotofana, Low Cost Multi-Error Correction for 3D Polyhedral Memories 1640_low_cost_multierror_correction_for_3d_polyhedral_memories.pdf (July 2017), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2017), 25-26 July 2017, Newporrt, USA [Conference Paper]
M. Escudero Martinez, A. Rubio, P. Pouyan, Reliability issues in RRAM ternary memories affected by variability and aging mechanisms (July 2017), 23rd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2017), 3-5 July 2017, Thessaloniki, Greece [Conference Proceedings]
R. Choupani, Scalable Video Coding 1615_scalable_video_coding.pdf (June 2017), [Phd Thesis]
N. Cucu Laurenciu, S.D. Cotofana, Fast and Accurate Workload-Level Neural Network Based IC Energy Consumption Estimation 1642_fast_and_accurate_workloadlevel_neural_network_based_ic_en.pdf (June 2017), International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD 2017), 12-15 June 2017, Taormina, Italy [Conference Paper]
L Riesebos, X. Fu, S. Varsamopulos, C.G. Almudever, K.L.M. Bertels, Pauli Frames for Quantum Computer Architectures (June 2017), 54th Design Automation Conference (DAC 2017), 18-22 June 2017, Austin USA [Conference Proceedings]
L Riesebos, X. Fu, S. Varsamopulos, C.G. Almudever, K.L.M. Bertels, Pauli Frames for Quantum Computer Architectures (June 2017), 54th Design Automation Conference (DAC 2017), 18-22 June 2017, Austin USA [Conference Proceedings]
J. Yu, T. Hogervorst, R. Nane, A Domain-Specific Language and Compiler for Computation-in-Memory Skeletons 1609_a_domainspecific_language_and_compiler_for_computationin.pdf (May 2017), 27th ACM Great Lakes Symposium on VLSI (GLSVLSI 2017), 10-12 May 2017, Banff, Canada [Conference Paper]
H.A. Du Nguyen, L. Xie, M. Taouil, R. Nane, S. Hamdioui, K.L.M. Bertels, On the Implementation of Computation-in-Memory Parallel Adder (May 2017), IEEE Transactions On Very Large Scale Integration (VLSI) Systems (TVLSI) [Journal Paper]
E. Vermij, L Fiorin, C Hagleitner, K.L.M. Bertels, Sorting big data on heterogeneous near-data processing systems 1625_sorting_big_data_on_heterogeneous_neardata_processing_syst.pdf (May 2017), ACM International Conference on Computing Frontiers 2017 (CF 2017), 15-17 May 2017, Siena, Italy [Conference Proceedings]
C Sgouropoulou, I Voyiatzis, A Koutoumanos, S. Hamdioui, P. Pouyan, M Comte, P Prinetto, G Farulla, C Delgado Kloos, R Crespo Garcia, Standards-based tools and services for building lifelong learning pathways (May 2017), IEEE Global Engineering Education Conference (EDUCON 2017), 25-28 April 2017, Athens, Greece [Conference Proceedings]
J.J. Hoozemans, R.W. Heij, J. van Straten, Z. Al-Ars, VLIW-based FPGA computational fabric with streaming memory hierarchy for medical imaging applications 1602_vliwbased_fpga_computational_fabric_with_streaming_memory.pdf (April 2017), 13th International Symposium on Applied Reconfigurable Computing (ARC2017), 3-7 April 2017, Delft, The Netherlands [Conference Paper]
A.A.C. Brandon, J.J. Hoozemans, J. van Straten, S. Wong, Exploring ILP and TLP on a Polymorphic VLIW Processor 1603_exploring_ilp_and_tlp_on_a_polymorphic_vliw_processor.pdf (April 2017), 30th International Conference on Architecture of Computing Systems (ARCS2017), 3-6 April 2017, Vienna, Austria [Conference Paper]
L. Xie, H.A. Du Nguyen, J. Yu, M. Taouil, S. Hamdioui, On the Robustness of Memristor Based Logic Gates (April 2017), IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2017), 19-21 April 2017, Dresden, Germany [Conference Proceedings]
L. Xie, H.A. Du Nguyen, M. Taouil, S. Hamdioui, K.L.M. Bertels, A Mapping Methodology of Boolean Logic Circuits on Memristor Crossbar (April 2017), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) [Journal Paper]
H.A. Du Nguyen, L. Xie, J. Yu, M. Taouil, S. Hamdioui, Interconnect Networks for Resistive Computing Architectures (April 2017), 12th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS 2017), 4-6 April 2017, Palma de Mallorca, Spain [Conference Paper]