Publications

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Type Year Author Title
Displaying 201-225 of 1584 result(s).
R Nobre, J.M.P. Cardoso, B Olivier, R. Nane, L Fitzpatrick, J G de F. Coutinho, J. van Someren, V.M. Sima, K.L.M. Bertels, P. Diniz, Hardware/Software Compilation (August 2013), Book Title "Compilation and Synthesis for Embedded Reconfigurable Systems: An Aspect-Oriented Approach", Published by Springer [Book Chapter]
T. Marconi, K.L.M. Bertels, G.N. Gaydadjiev, A Novel Productivity-Driven Logic Element for Field-Programmable Devices 1343_a_novel_productivitydriven_logic_element_for_fieldprogram.pdf (July 2013), International Journal of Electronics (IJE) [Journal Paper]
G.R. Voicu, S.D. Cotofana, Towards Heterogenous 3D-Stacked Reliable Computing with von Neumann Multiplexing 1369_towards_heterogenous_3dstacked_reliable_computing_with_von.pdf (July 2013), 9th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH 2013), July 15-17, 2013, New York City, USA [Conference Paper]
G. Keramidas, S. Wong, F. Anjam, A.A.C. Brandon, R.A.E. Seedorf, C. Scordino, L. Carro, D. Matos, R. Giorgi, S. Kavvadias, S.A. McKee, B. Goel, V. Spiliopoulos, Embedded Reconfigurable Computing: the ERA Approach 1381_embedded_reconfigurable_computing_the_era_approach.pdf (July 2013), 11th IEEE International Conference on Industrial Informatics (INDIN 2013), 29-31 July 2013, Bochum, Germany [Conference Paper]
R. Ferreira, V. Duarte, W. Meireles, M Pereira, L. Carro, S. Wong, A Just-In-Time Modulo Scheduling for Virtual Coarse-Grained Reconfigurable Architectures 1428_a_justintime_modulo_scheduling_for_virtual_coarsegrained.pdf (July 2013), International Conference on Embedded Computer Systems: Architecture Modeling and Simulation (IC-SAMOS 2013), 15-18 July 2013, Samos, Greece [Conference Paper]
J. de Sonneville, K.-J. van der Kolk, W. Veneman, R. Lodder, Z. Al-Ars, H. Spaink, Analysing RNA-seq data using GeneTiles 1432_analysing_rnaseq_data_using_genetiles.pdf (July 2013), European Zebrafish Meeting (EZM 2013), 9-13 July 2013, Bercelona, Spain [Conference Paper]
G.R. Voicu, M. Lefter, M. Enachescu, S.D. Cotofana, 3D Stacked Wide-Operand Adders: A Case Study 1586_3d_stacked_wideoperand_adders_a_case_study.pdf (June 2013), 24th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2013), 5-7 June 2013, Washington D.C., USA [Conference Paper]
E.K. Bankas, K.A. Gbolagade, S.D. Cotofana, An Effective New CRT Based Reverse Converter for a Novel Moduli Set { 2^(2n+1)-1, 2^(2n+1), 2^(2n)-1 } 1588_an_effective_new_crt_based_reverse_converter_for_a_novel_mo.PDF (June 2013), 24th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2013), 5-7 June 2013, Washington D.C., USA [Conference Paper]
K. Chandrasekar, C. Weis, B. Akesson, N. Wehn, K.G.W. Goossens, Towards Variation-Aware System-Level Power Estimation of DRAMs: An Empirical Approach 1342_towards_variationaware_systemlevel_power_estimation_of_dr.pdf (June 2013), 50th Design Automation Conference (DAC 2013), 2-6 June 2013, Austin, USA , HiPEAC Paper Award [Conference Paper]
A.M.M.O. Cortez, V. van der Leest, R. Maes, G.J. Schrijen, S. Hamdioui, Adapting Voltage Ramp-up Time for Temperature Noise Reduction on Memory-based PUFs 1345_adapting_voltage_rampup_time_for_temperature_noise_reducti.pdf (June 2013), IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2013), 2-3 June 2013, Austin, USA [Conference Paper]
S. M. Alavi, G.R. Voicu, R. B. Staszewski, L. C. de Vreede, J.R. Long, A 2x13-bit All-Digital I/Q RF-DAC in 65-nm CMOS (June 2013), IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2013), 2-4 June 2013, Seattle, USA , Best Student Paper Award - 2nd Place [Conference Proceedings]
L Petrica, V Codreanu, S.D. Cotofana, VASILE: A Reconfigurable Vector Architecture for Instruction Level Frequency Scaling 1367_vasile_a_reconfigurable_vector_architecture_for_instructio.pdf (June 2013), 12th IEEE Low Voltage Low Power Conference (FTFC 2013), 20-21 June 2013, Paris, France [Conference Paper]
C Bira, L Gugu, R Hobincu, V Codreanu, L Petrica, S.D. Cotofana, An Energy Effective SIMD Accelerator for Visual Pattern Matching 1368_an_energy_effective_simd_accelerator_for_visual_pattern_mat.pdf (June 2013), 4th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 2013), 13-14 June 2013, Edinburgh, Scotland [Conference Paper]
C. Pham-Quoc, Z. Al-Ars, K.L.M. Bertels, Heterogeneous Hardware Accelerators Interconnect: An Overview 1371_heterogeneous_hardware_accelerators_interconnect_an_overvi.pdf (June 2013), NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2013), 25-27 June 2013, Torino, Italy [Conference Paper]
D. Mirzoyan, B. Akesson, K.G.W. Goossens, Process-Variation Aware Mapping of Best-Effort and Real-Time Streaming Applications to MPSoCs 1390_processvariation_aware_mapping_of_besteffort_and_realtim.pdf (June 2013), ACM Transactions on Embedded Computing Systems (TECS) [Journal Paper]
M. Enachescu, M. Lefter, A. Bazigos, A. Ionescu, S.D. Cotofana, Ultra Low Power NEMFET Based Logic 1589_ultra_low_power_nemfet_based_logic.pdf (May 2013), IEEE International Symposium on Circuits and Systems (ISCAS 2013), 19-23 May 2013, Beijing, China [Conference Paper]
Y. Wang, S.D. Cotofana, L. Fang, Lifetime Reliability Assessment with Aging Information from Low-Level Sensors 1591_lifetime_reliability_assessment_with_aging_information_from.pdf (May 2013), Great Lakes Symposium on VLSI (GLSVLSI 2013 ), 2-3 May 2013, Paris, France [Conference Paper]
R.J. Meeuws, S.A. Ostadzadeh, C. Galuzzi, V.M. Sima, R. Nane, K.L.M. Bertels, Quipu: A Statistical Modelling Approach for Predicting Hardware Resources 1351_quipu_a_statistical_modelling_approach_for_predicting_hard.pdf (May 2013), ACM Transactions on Reconfigurable Technology and Systems (TRETS), volume 6, issue 1 [Journal Paper]
M.S. Khan, S. Hamdioui, H. Kukner, P. Raghavan, F. Catthoor, Bias temperature instability analysis in SRAM decoder (May 2013), 18th IEEE European Test Symposium (ETS 2013), 27-31 May 2013, Avignon, France [Conference Paper]
C. Papameletis,, B. Keller, V. Chickermane, E.J. Marinissen, Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers 1417_automated_dft_insertion_and_test_generation_for_3dsics_wit.pdf (May 2013), 18th IEEE European Test Symposium (ETS 2013), 27-31 May 2013, Avignon, France [Conference Proceedings]
C. Papameletis,, B. Keller, V. Chickermane, E.J. Marinissen, S. Hamdioui, Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers 1419_automated_dft_insertion_and_test_generation_for_3dsics_wit.pdf (May 2013), 18th IEEE European Test Symposium (ETS 2013), 27-31 May 2013, Avignon, France [Conference Paper]
H. Mushtaq, Z. Al-Ars, K.L.M. Bertels, Efficient Software Based Fault Tolerance Approach on Multicore Platforms 1321_efficient_software_based_fault_tolerance_approach_on_multic.pdf (March 2013), Design, Automation & Test in Europe Conference & Exhibition (DATE 2013), 18-22 March 2013, Grenoble, France [Conference Paper]