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Type Year Author Title
Displaying 176-200 of 1685 result(s).
L Fiorin, E. Vermij, J van Lunteren, R Jongerius, C Hagleitner, An energy-efficient custom architecture for the SKA1-low central signal processor 1484_an_energyefficient_custom_architecture_for_the_ska1low_ce.pdf (May 2015), ACM International Conference on Computing Frontiers (CF 2015), 18-21 May 2015, Ischia, Italy [Conference Paper]
T. Marconi, S.D. Cotofana, Dynamic Bitstream Length Scaling Energy Effective Stochastic LDPC Decoding 1486_dynamic_bitstream_length_scaling_energy_effective_stochasti.pdf (May 2015), ACM Great Lakes VLSI Symposium (GLSVLSI 2015), 20-22 May 2015, Pittsburgh, USA [Conference Paper]
M. Taouil, M. Masadeh, S. Hamdioui, E.J. Marinissen, Post-Bond Interconnect Test and Diagnosis for 3D Memory Stacked on Logic (May 2015), IEEE Transactions on Computers (TC), issue 99 [Journal Paper]
Y Sfikas, Y Tsiatouhas, M. Taouil, S. Hamdioui, On Resistive Open Defect Detection in DRAMs: The Charge Accumulation Effect (May 2015), 20th IEEE European Test Symposium (ETS 2015), 25-29 May 2015, Cluj-Napoca, Romania [Conference Proceedings]
R. Ferreira, L. Rocha, A. Santos, J. Nacif, S. Wong, L. Carro, A Runtime FPGA Placement and Routing Using Low-Complexity Graph Traversal 1539__a_runtime_fpga_placement_and_routing_using_lowcomplexity.pdf (April 2015), ACM Transactions on Reconfigurable Technology and Systems (TRETS), volume 8, issue 2 [Journal Paper]
A.M.M.O. Cortez, S. Hamdioui, A. Kaichouhi, V. van der Leest, R. Maes, G.J. Schrijen, Intelligent Voltage Ramp-up Time Adaptation for Temperature Noise Reduction on Memory-based PUF Systems 1474_intelligent_voltage_rampup_time_adaptation_for_temperature.pdf (April 2015), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), volume 34, issue 7 , DOI: 10.1109/TCAD.2015.2422844 [Journal Paper]
I.O. Agbo, M. Taouil, S. Hamdioui, S. Cosemans, P Weckx, P. Raghavan, F. Catthoor, Comparative Analysis of R-D and Atomistic Trap-Based BTI models on SRAM Sense Amplifier 1482_comparative_analysis_of_rd_and_atomistic_trapbased_bti_mo.pdf (April 2015), Design and Technology of Integrated Systems in the Nanoscale Era (DTIS 2015), 21-23 April 2015, Naples, Italy , Best Paper Award [Conference Proceedings]
I.O. Agbo, M. Taouil, S. Hamdioui, H. Kukner, P Weckx, P. Raghavan, F. Catthoor, Integral Impact of BTI and Voltage Temperature Variation on SRAM Sense Amplifier 1483_integral_impact_of_bti_and_voltage_temperature_variation_on.pdf (April 2015), IEEE VLSI Test Symposium (VTS 2015), 27-29 April 2015, Napa, USA [Conference Proceedings]
A. Gheolbanoiu, L Petrica, S.D. Cotofana, Hybrid Adaptive Clock Management for FPGA Processor Acceleration (March 2015), 18th Design, Automation & Test in Europe conference (DATE 2015), 9-13 March 2015, Grenoble, France [Conference Paper]
R. Choupani, S. Wong, M.R. Tolun, Hierarchical SNR Scalable Video Coding with Adaptive Quantization for Reduced Drift Error 1611_hierarchical_snr_scalable_video_coding_with_adaptive_quanti.pdf (March 2015), 10th International Joint Conference on Computer Vision, Imaging and Computer Graphics Theory and Applications (VISAPP 2015), 11-14 March 2015, Berlin, Germany [Conference Paper]
C. Chen, M. Enachescu, S.D. Cotofana, Enabling Vertical Wormhole Switching in 3D NoC-Bus Hybrid Systems (March 2015), 18th Design, Automation & Test in Europe conference (DATE 2015), 9-13 March 2015, Grenoble, France [Conference Paper]
I.O. Agbo, M. Taouil, S. Hamdioui, H. Kukner, P Weckx, P. Raghavan, F. Catthoor, BTI Analysis for High Performance and Low power SRAM Sense Amplifier 1461_bti_analysis_for_high_performance_and_low_power_sram_sense.pdf (March 2015), 4th Workshop On Manufacturable and Dependable Multicore Architectures (MEDIAN 2015), 13 March 2015, Grenoble, France [Conference Paper]
A.M.M.O. Cortez, S. Hamdioui, R. Ishihara, Design Dependent SRAM PUF Robustness Analysis 1472_design_dependent_sram_puf_robustness_analysis.pdf (March 2015), 16th IEEE Latin-American Test Symposium (LATS 2015), 25-27 March 2015, Puerto Vallarta, Mexico , DOI: 10.1109/LATW.2015.7102498 [Conference Paper]
A.M.M.O. Cortez, S. Hamdioui, G. Di Natale, M.-L. Flottes, B. Rouzeyre, Hierarchical Secure DfT (March 2015), Workshop on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE 2015), 13 March 2015, Grenoble, France [Conference Paper]
H.A. Du Nguyen, Z. Al-Ars, G Smaragdos, C. Strydis, Accelerating complex brain-model simulations on GPU platforms 1475_accelerating_complex_brainmodel_simulations_on_gpu_platfor.pdf (March 2015), 18th Design, Automation & Test in Europe conference (DATE 2015), 9-13 March 2015, Grenoble, France [Conference Paper]
S. Hamdioui, L. Xie, H.A. Du Nguyen, M. Taouil, K.L.M. Bertels, Memristor Based Computation-in-Memory Architecture for Data-Intensive Applications 1476_memristor_based_computationinmemory_architecture_for_data.pdf (March 2015), 18th Design, Automation & Test in Europe conference (DATE 2015), 9-13 March 2015, Grenoble, France [Conference Paper]
E. Vermij, L Fiorin, R Jongerius, C Hagleitner, K.L.M. Bertels, Challenges in exascale radio astronomy: can the SKA ride the technology wave? 1471_challenges_in_exascale_radio_astronomy_can_the_ska_ride_th.pdf (February 2015), International Journal of High Performance Computing Applications (IJHPCA), volume 29, issue 1 [Journal Paper]
S. Hamdioui, M. Taouil, N.Z.B. Haron, Testing Open Defects in Memristor-Based Memories 1409_testing_open_defects_in_memristorbased_memories.pdf (January 2015), IEEE Transactions on Computers (TC), volume 64, issue 1 [Journal Paper]
R. Ferreira, W Denver, M Pereira, S. Wong, C. A. L. Arthur Lang Lisbôa, L. Carro, A Dynamic Modulo Scheduling with Binary Translation: Loop Optimization with Software Compatibility 1503_a_dynamic_modulo_scheduling_with_binary_translation_loop_o.pdf (January 2015), Journal of Signal Processing Systems (JSPS) , [Journal Paper]
M. de Jong, V.M. Sima, K.L.M. Bertels, D. Thomas, FPGA-accelerated Monte-Carlo integration using stratified sampling and Brownian bridges 1542_fpgaaccelerated_montecarlo_integration_using_stratified_s.pdf (December 2014), International Conference on Field Programmable Technology (FPT 2014), 10-12 December 2014, Shanghai, China [Conference Paper]
H. Siewobr, K.A. Gbolagade, S.D. Cotofana, An efficient residue-to-binary converter for the new moduli set {2^{n/2} ± 1, 2^{2+1},2^n + 1} (December 2014), 4th International Symposium on Integrated Circuits (ISIC), 10-12 December 2014, Singapore [Conference Paper]
C. Chen, S.D. Cotofana, Link Bandwidth Aware Backtracking Based Dynamic Task Mapping in NoC based MPSoCs (December 2014), 7th International Workshop on Network on Chip Architectures (NoCArc 2014), 13-17 December 2014, Cambridge, UK [Conference Paper]