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Displaying 176-200 of 1700 result(s).
E.J. Houtgast, V.M. Sima, K.L.M. Bertels, Z. Al-Ars, An FPGA-Based Systolic Array to Accelerate the BWA-MEM Genomic Mapping Algorithm 1499_an_fpgabased_systolic_array_to_accelerate_the_bwamem_geno.pdf (September 2015), International Conference On Embedded Computer Systems: Architectures, Modeling, And Simulation (SAMOS XV (2015)), 20-23 July 2015, Samos, Greece [Conference Paper]
M. Jaspers, Acceleration of read alignment with coherent attached FPGA coprocessors 1664_acceleration_of_read_alignment_with_coherent_attached_fpga.pdf (August 2015), [Msc Thesis]
G. Nazarian, R. Nane, G.N. Gaydadjiev, Low-cost Software Control-Flow Error Recovery 1496_lowcost_software_controlflow_error_recovery.pdf (August 2015), 18th Euromicro Conference on Digital Systems Design (DSD 2015), 26-28 August 2015, Funchal, Madeira (Portugal) [Conference Paper]
A.P. Thomas, Gearbox Control Unit for the Paddle-shift System: Implementation and Verification of the Hardware and Software (August 2015), [Msc Thesis]
A. L. Sartor, A. F Lorenzon, L. Carro, F. Kastensmidt, S. Wong, A.C.S. Beck, A Novel Phase-based Low Overhead Fault Tolerance Approach for VLIW Processors 1485_a_novel_phasebased_low_overhead_fault_tolerance_approach_f.pdf (July 2015), IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 08-10 July 2015, Montpellier, France [Conference Paper]
I. Ashraf, K.L.M. Bertels, N. Khammassi, J.C. Le Lann, Communication-aware Parallelization Strategies for High Performance Applications 1487_communicationaware_parallelization_strategies_for_high_per.pdf (July 2015), IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 08-10 July 2015, Montpellier, France [Conference Paper]
I. Ashraf, V.M. Sima, K.L.M. Bertels, Intra-Application Data-Communication Characterization 1488_intraapplication_datacommunication_characterization.pdf (July 2015), 1st International Workshop on Communication Architectures at Extreme Scale (ExaComm 2015), 16 July 2015, Frankfurt, Germany [Conference Paper]
H.A. Du Nguyen, L. Xie, R. Nane, M. Taouil, S. Hamdioui, K.L.M. Bertels, Computation-In-Memory Based Parallel Adder 1497_computationinmemory_based_parallel_adder.pdf (July 2015), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 15), 8-10 July 2015, Boston, USA [Conference Paper]
L. Xie, H.A. Du Nguyen, M. Taouil, S. Hamdioui, K.L.M. Bertels, Interconnect Networks for Memristor Crossbar (July 2015), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 15), 8-10 July 2015, Boston, USA [Conference Proceedings]
J.J. Hoozemans, S. Wong, Z. Al-Ars, Using VLIW Softcore Processors for Image Processing Applications 1506_using_vliw_softcore_processors_for_image_processing_applica.pdf (July 2015), International Conference On Embedded Computer Systems: Architectures, Modeling, And Simulation (SAMOS XV (2015)), 20-23 July 2015, Samos, Greece [Conference Paper]
M. Taouil, S. Hamdioui, E.J. Marinissen, Yield Improvement for 3D Wafer-to-Wafer Stacked ICs Using Wafer Matching (June 2015), ACM Transactions on Design Automation of Electronic Systems (TODAES), volume 20, issue 2 [Journal Paper]
H. Mushtaq, Deterministic Execution of Multithreaded Applications for Reliability of Multicore Systems 1493_deterministic_execution_of_multithreaded_applications_for_r.pdf (June 2015), [Phd Thesis]
N. Cucu Laurenciu, S.D. Cotofana, Low Cost and Energy, Thermal Noise Driven, Probability Modulated Random Number Generator 1551_low_cost_and_energy_thermal_noise_driven_probability_modu.pdf (May 2015), IEEE International Symposium on Circuits and Systems (ISCAS 2015), 24-27 May 2015, Lisbon, Portugal [Conference Paper]
J. Chen, A. Tisserand, E. Popovici, S.D. Cotofana, Asynchronous Charge Sharing Power Consistent Montgomery Multiplier (May 2015), 21st IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), 4-6 May 2015, Mountain View, Silicon Valley, California, USA [Conference Paper]
M. Lefter, G.R. Voicu, S.D. Cotofana, A Shared Polyhedral Cache for 3D Wide-I/O Multi-Core Computing Platforms 1478_a_shared_polyhedral_cache_for_3d_wideio_multicore_comput.pdf (May 2015), IEEE International Symposium on Circuits and Systems (ISCAS 2015), 24-27 May 2015, Lisbon, Portugal [Conference Paper]
L Fiorin, E. Vermij, J van Lunteren, R Jongerius, C Hagleitner, An energy-efficient custom architecture for the SKA1-low central signal processor 1484_an_energyefficient_custom_architecture_for_the_ska1low_ce.pdf (May 2015), ACM International Conference on Computing Frontiers (CF 2015), 18-21 May 2015, Ischia, Italy [Conference Paper]
T. Marconi, S.D. Cotofana, Dynamic Bitstream Length Scaling Energy Effective Stochastic LDPC Decoding 1486_dynamic_bitstream_length_scaling_energy_effective_stochasti.pdf (May 2015), ACM Great Lakes VLSI Symposium (GLSVLSI 2015), 20-22 May 2015, Pittsburgh, USA [Conference Paper]
M. Taouil, M. Masadeh, S. Hamdioui, E.J. Marinissen, Post-Bond Interconnect Test and Diagnosis for 3D Memory Stacked on Logic (May 2015), IEEE Transactions on Computers (TC), issue 99 [Journal Paper]
Y Sfikas, Y Tsiatouhas, M. Taouil, S. Hamdioui, On Resistive Open Defect Detection in DRAMs: The Charge Accumulation Effect (May 2015), 20th IEEE European Test Symposium (ETS 2015), 25-29 May 2015, Cluj-Napoca, Romania [Conference Proceedings]
R. Ferreira, L. Rocha, A. Santos, J. Nacif, S. Wong, L. Carro, A Runtime FPGA Placement and Routing Using Low-Complexity Graph Traversal 1539__a_runtime_fpga_placement_and_routing_using_lowcomplexity.pdf (April 2015), ACM Transactions on Reconfigurable Technology and Systems (TRETS), volume 8, issue 2 [Journal Paper]
A.M.M.O. Cortez, S. Hamdioui, A. Kaichouhi, V. van der Leest, R. Maes, G.J. Schrijen, Intelligent Voltage Ramp-up Time Adaptation for Temperature Noise Reduction on Memory-based PUF Systems 1474_intelligent_voltage_rampup_time_adaptation_for_temperature.pdf (April 2015), IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), volume 34, issue 7 , DOI: 10.1109/TCAD.2015.2422844 [Journal Paper]
I.O. Agbo, M. Taouil, S. Hamdioui, S. Cosemans, P Weckx, P. Raghavan, F. Catthoor, Comparative Analysis of R-D and Atomistic Trap-Based BTI models on SRAM Sense Amplifier 1482_comparative_analysis_of_rd_and_atomistic_trapbased_bti_mo.pdf (April 2015), Design and Technology of Integrated Systems in the Nanoscale Era (DTIS 2015), 21-23 April 2015, Naples, Italy , Best Paper Award [Conference Proceedings]
I.O. Agbo, M. Taouil, S. Hamdioui, H. Kukner, P Weckx, P. Raghavan, F. Catthoor, Integral Impact of BTI and Voltage Temperature Variation on SRAM Sense Amplifier 1483_integral_impact_of_bti_and_voltage_temperature_variation_on.pdf (April 2015), IEEE VLSI Test Symposium (VTS 2015), 27-29 April 2015, Napa, USA [Conference Proceedings]
C Papameletis, B. Keller, V. Chickermane, S. Hamdioui, E.J. Marinissen, A DfT Architecture and Tool Flow for 3-D SICs With Test Data Compression, Embedded Cores, and Multiple Towers 1511_a_dft_architecture_and_tool_flow_for_3d_sics_with_test_dat.pdf (April 2015), IEEE Design & Test of Computers (D&ToC), volume 32, issue 4 [Journal Paper]
A. Gheolbanoiu, L Petrica, S.D. Cotofana, Hybrid Adaptive Clock Management for FPGA Processor Acceleration (March 2015), 18th Design, Automation & Test in Europe conference (DATE 2015), 9-13 March 2015, Grenoble, France [Conference Paper]
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