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Type Year Author Title
Displaying 151-175 of 1695 result(s).
A. Amaricai, V. Savin, O. Boncalo, N. Cucu Laurenciu, J. Chen, S.D. Cotofana, Timing Error Analysis of Flooded LDPC Decoders (November 2015), IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems (COMCAS), 2-4 November 2015, Tel-Aviv, Israel [Conference Paper]
A. Amaricai, N. Cucu Laurenciu, O. Boncalo, J. Chen, S. Nimara, V. Savin, S.D. Cotofana, Multi-Level Probabilistic Timing Error Reliability Analysis Using a Circuit Dependent Fault Map Generation (November 2015), XXX Conference on Design of Circuits and Integrated Systems (DCIS 2015), 25-27 November 2015, Estoril, Portugal [Conference Paper]
K. Meun, Fault tolerance on the ρ-VEX processor 1673__fault_tolerance_on_the_vex_processor.pdf (November 2015), [Msc Thesis]
H. Mushtaq, Z. Al-Ars, Cluster-Based Apache Spark Implementation of the GATK DNA Analysis Pipeline 1680_clusterbased_apache_spark_implementation_of_the_gatk_dna_a.pdf (November 2015), IEEE International Conference on Bioinformatics and Biomedicine (BIBM 2015), 9-12 November 2015, Washington DC, USA [Conference Paper]
C. Pham-Quoc, I. Ashraf, Z. Al-Ars, K.L.M. Bertels, Heterogeneous Hardware Accelerators with Hybrid Interconnect: an Automated Design Approach 1498_heterogeneous_hardware_accelerators_with_hybrid_interconnec.pdf (November 2015), International Conference on Advanced Computing and Applications (ACOMP 2015), 23-25 November 2015, Ho Chi Minh City, Vietnam [Conference Proceedings]
N. Ahmed, V.M. Sima, E.J. Houtgast, K.L.M. Bertels, Z. Al-Ars, Heterogeneous Hardware/Software Acceleration of the BWA-MEM DNA Alignment Algorithm 1500_heterogeneous_hardwaresoftware_acceleration_of_the_bwamem.pdf (November 2015), International Conference On Computer Aided Design (ICCAD 2015), 2-6 November 2015, Austin, USA [Conference Paper]
L Brasca, M Sonza Reorda, S. Hamdioui, SW-based transparent in-field memory testing (November 2015), 16th IEEE Latin-American Test Symposium (LATS 2015), 25-27 March 2015, Puerto Vallarta, Mexico [Conference Proceedings]
S. Hamdioui, M. Taouil, H.A. Du Nguyen, M.A.B. Haron, L. Xie, K.L.M. Bertels, Memristor: The Enabler of Computation-in-Memory Architecture for Big-Data (November 2015), International Conference on Memristive Systems (MEMRISYS 2015), 8 - 10 November 2015, Paphos, Cyprus [Conference Proceedings]
A Gebregiorgis, M Ebrahimi, S Kiamehr, F Oboril, S. Hamdioui, M Baradaran Tahoori, Aging mitigation in memory arrays using selfcontrolled bit-flipping technique (November 2015), 20th Asia and South Pacific Design Automation Conference (ASP-DAC 2015), 19-22 January 2015, Tokyo, Japan [Conference Proceedings]
I.O. Agbo, M. Taouil, S. Hamdioui, P Weckx, S. Cosemans, P. Raghavan, F. Catthoor, W Dehaene, Comparative BTI Impact for SRAM Cell and Sense Amplifier Designs 1516_comparative_bti_impact_for_sram_cell_and_sense_amplifier_de.pdf (November 2015), MEDIAN Finale - Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2015), 10-11 November 2015, Tallinn, Estonia [Conference Proceedings]
S. Ren, V.M. Sima, Z. Al-Ars, FPGA Acceleration of the Pair-HMMs Forward Algorithm for DNA Sequence Analysis 1525_fpga_acceleration_of_the_pairhmms_forward_algorithm_for_dn.pdf (November 2015), International Workshop on High Performance Computing on Bioinformatics (HPCB 2015), 9-12 November 2015, Washington DC, USA [Conference Paper]
J.S.P. Giraldo, A. L. Sartor, L. Carro, S. Wong, A.C.S. Beck, Evaluation of energy savings on a VLIW processor through dynamic issue-width adaptation 1538_evaluation_of_energy_savings_on_a_vliw_processor_through_dy.pdf (October 2015), 2015 International Symposium on Rapid System Prototyping (RSP2015), 8-9 October 2016, Pittsburgh, PA, USA [Conference Paper]
S. Grandhi, D. McCarthy, C. Spagnol, E. Popovici, S.D. Cotofana, ROST-C: Reliability Driven Optimisation and Synthesis Techniques for Combinational Circuits (October 2015), 33rd IEEE International Conference on Computer Design (ICCD 2015), 18-21 October 2015, New York, USA [Conference Paper]
L. Xie, H.A. Du Nguyen, M. Taouil, S. Hamdioui, K.L.M. Bertels, Fast Boolean Logic Mapped on Memristor Crossbar 1505_fast_boolean_logic_mapped_on_memristor_crossbar.pdf (October 2015), 33rd IEEE International Conference on Computer Design (ICCD 2015), 18-21 October 2015, New York, USA , Best Paper Award [Conference Paper]
T. Marconi, C. Spagnol, E. Popovici, S.D. Cotofana, Transmission Channel Noise Aware Energy Effective LDPC Decoding 1508_transmission_channel_noise_aware_energy_effective_ldpc_deco.pdf (October 2015), Book Title "VLSI-SoC: Internet of Things Foundations", Published by Springer International Publishing [Book Chapter]
H. Mushtaq, Z. Al-Ars, K.L.M. Bertels, Calculation of Worst-Case Execution Time for Multicore Processors using Deterministic Execution 1679_calculation_of_worstcase_execution_time_for_multicore_proc.pdf (September 2015), 25th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2015), 1-4 September 2015, Salvador, Brazil [Conference Paper]
Z. Al-Ars, H. Mushtaq, Scalability Potential of BWA DNA Mapping Algorithm on Apache Spark 1495_scalability_potential_of_bwa_dna_mapping_algorithm_on_apach.pdf (September 2015), 2nd Annual International Symposium on Information Management and Big Data (SIMBig 2015), 2-4 September 2015, Cusco, Peru [Conference Paper]
E.J. Houtgast, V.M. Sima, K.L.M. Bertels, Z. Al-Ars, An FPGA-Based Systolic Array to Accelerate the BWA-MEM Genomic Mapping Algorithm 1499_an_fpgabased_systolic_array_to_accelerate_the_bwamem_geno.pdf (September 2015), International Conference On Embedded Computer Systems: Architectures, Modeling, And Simulation (SAMOS XV (2015)), 20-23 July 2015, Samos, Greece [Conference Paper]
G. Nazarian, R. Nane, G.N. Gaydadjiev, Low-cost Software Control-Flow Error Recovery 1496_lowcost_software_controlflow_error_recovery.pdf (August 2015), 18th Euromicro Conference on Digital Systems Design (DSD 2015), 26-28 August 2015, Funchal, Madeira (Portugal) [Conference Paper]
A. L. Sartor, A. F Lorenzon, L. Carro, F. Kastensmidt, S. Wong, A.C.S. Beck, A Novel Phase-based Low Overhead Fault Tolerance Approach for VLIW Processors 1485_a_novel_phasebased_low_overhead_fault_tolerance_approach_f.pdf (July 2015), IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 08-10 July 2015, Montpellier, France [Conference Paper]