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Type Year Author Title
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Displaying 226-250 of 1700 result(s).
J. Chen, E. Popovici, A. Tisserand, S.D. Cotofana, Robust Sub-Powered Asynchronous Logic (September 2014), International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS 2014), 29 September - 1 October 2014, Palma de Mallorca, Spain [Conference Paper]
S. Grandhi, C. Spagnol, J. Chen, E. Popovici, S.D. Cotofana, Reliability Aware Logic Synthesis through Rewriting (September 2014), 27th International IEEE SoC (System-on-Chip) Conference (SOCC), 2-5 September, Las Vegas, USA [Conference Paper]
A.M.M.O. Cortez, G. Roelofs, S. Hamdioui, G. Di Natale, Secure Test Method for Fuzzy Extractor (September 2014), Joint MEDIAN–TRUDEVICE Open Forum, 30 September 2014, Amsterdam, The Netherlands [Conference Paper]
I.O. Agbo, M. Taouil, S. Hamdioui, H. Kukner, P. Raghavan, F. Catthoor, Impact of BTI on SRAM Sense Amplifier in the Presence of Temperature and Process Variation 1453_impact_of_bti_on_sram_sense_amplifier_in_the_presence_of_te.pdf (September 2014), Joint MEDIAN–TRUDEVICE Open Forum, 30 September 2014, Amsterdam, The Netherlands [Conference Proceedings]
J. Timmerman, Hardware and Software Design of the Microthrust Power and Control System 1458_hardware_and_software_design_of_the_microthrust_power_and_c.pdf (September 2014), [Msc Thesis]
M. Taouil, Yield and Cost Analysis for 3D Stacked ICs (September 2014), , (Cum Laude) [Phd Thesis]
R. Choupani, S. Wong, M.R. Tolun, Spatial multiple description coding for scalable video streams (August 2014), International Journal of Digital Multimedia Broadcasting, volume 2014 [Journal Paper]
M.B. Reda, Design-time and Run-time Reconfigurable Clustered ρ-VEX VLIW Softcore Processor 1675_designtime_and_runtime_reconfigurable_clustered_vex_vl.pdf (August 2014), [Msc Thesis]
R. Nane, V.M. Sima, C. Pham-Quoc, F Goncalves, K.L.M. Bertels, High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain 1439_highlevel_synthesis_in_the_delft_workbench_hardwaresoftwa.pdf (August 2014), 12th IEEE International Conference on Embedded and Ubiquitous Computing (EUC 2014), 26-28 August 2014, Milan, Italy [Conference Paper]
M. Lefter, M. Enachescu, G.R. Voicu, S.D. Cotofana, Energy Effective 3D Stacked Hybrid NEMFET-CMOS Caches 1582_energy_effective_3d_stacked_hybrid_nemfetcmos_caches.pdf (July 2014), 10th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH 2014), 8-10 July 2014, Paris, France [Conference Paper]
C. Chen, S.D. Cotofana, Towards an Effective Utilization of Partially Defected Interconnections in 2D Mesh NoCs 1583_towards_an_effective_utilization_of_partially_defected_inte.pdf (July 2014), IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2014), 9-11 July 2014, Tampa, USA [Conference Paper]
N. Cucu Laurenciu, S.D. Cotofana, Probability Density Function Based Reliability Evaluation of Large-Scale ICs 1585_probability_density_function_based_reliability_evaluation_o.pdf (July 2014), 10th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH 2014), 8-10 July 2014, Paris, France [Conference Paper]
J. Chen, C. Spagnol, S. Grandhi, E. Popovici, A. Amaricai, S.D. Cotofana, Linear Compositional Delay Model for the Timing Analysis of Sub-Powered Combinational Circuits 1441_linear_compositional_delay_model_for_the_timing_analysis_of.pdf (July 2014), IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2014), 9-11 July 2014, Tampa, USA [Conference Paper]
R. Ferreira, W Denver, M Pereira, J Quadros, L. Carro, S. Wong, A Run-Time Modulo Scheduling by using a Binary Translation Mechanism 1462_a_runtime_modulo_scheduling_by_using_a_binary_translation.pdf (July 2014), International Conference on Embedded Computer Systems: Architecture Modeling and Simulation (IC-SAMOS 2014), 14-17 July 2014 , Samos, Greece [Conference Paper]
P. D Joshi, S. Hamdioui, Line graph based fast rerouting and reconfiguration for handling transient and permanent node failures (July 2014), IEEE 15th International Conference on High Performance Switching and Routing (HPSR 2014), 1-4 July 2014, Vancouver, Canada [Conference Proceedings]
Y. Wang, S.D. Cotofana, L. Fang, Analysis of the Impact of Spatial and Temporal Variation on the Stability of SRAM Arrays and Mitigation Technique Using Independent-Gate Devices 1566_analysis_of_the_impact_of_spatial_and_temporal_variation_on.pdf (June 2014), Journal of Parallel and Distributed Computing, volume 74, issue 6 [Journal Paper]
N. Cucu Laurenciu, S.D. Cotofana, Critical Transistors Nexus Based Circuit-Level Aging Assessment and Prediction 1358_critical_transistors_nexus_based_circuitlevel_aging_assess.pdf (June 2014), Journal of Parallel and Distributed Computing, volume 74, issue 6 [Journal Paper]
Y Sfikas, Y Tsiatouhas, S. Hamdioui, Layout-Based Refined NPSF Model for DRAM Characterization and Testing (June 2014), IEEE Transactions On Very Large Scale Integration (VLSI) Systems (TVLSI), volume 22 [Journal Paper]
E. Vermij, L Fiorin, C Hagleitner, K.L.M. Bertels, Exascale Radio Astronomy: Can We Ride the Technology Wave? (June 2014), International Supercomputing Conference (ISC 2014), 22-26 June 2014, Leipzig, Germany [Conference Paper]
M.A.F.M. Daverveldt, LLVM-based ρ-VEX compiler 1676_llvmbased_vex_compiler.pdf (May 2014), [Msc Thesis]
C. Pham-Quoc, Z. Al-Ars, K.L.M. Bertels, Automated Hybrid Interconnect Design for FPGA Accelerators Using Data Communication Profiling 1437_automated_hybrid_interconnect_design_for_fpga_accelerators.pdf (May 2014), 28th International Parallel & Distributed Processing Symposium Workshops (IPDPSW 2014), 19-23 May 2014, Phoenix, USA [Conference Paper]
D Sabena, L. Sterpone, M Schölzel, T Koal, H T Vierhaus, S. Wong, R Glein, F Rittner, C Stender, M. Porrmann, J Hagemeyer, Reconfigurable High Performance Architectures: How much are they ready for safety-critical applications? 1463_reconfigurable_high_performance_architectures_how_much_are.pdf (May 2014), 19th IEEE European Test Symposium (ETS 2014), 26-30 May 2014 , Paderborn, Germany [Conference Paper]
S. Hamdioui, 3D/ 2.5D stacked IC cost modeling and test flow selection (May 2014), IEEE 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS 2014), 6-8 May 2014, Santorini, Greece [Conference Proceedings]
S. Hamdioui, H Aziza, G. Ch Sirakoulis, Memristor based memories: Technology, design and test (May 2014), IEEE 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS 2014), 6-8 May 2014, Santorini, Greece [Conference Proceedings]
M. Nadeem, Adaptive, Low-power Architectures for Embedded Multimedia Systems 1477_adaptive_lowpower_architectures_for_embedded_multimedia_s.pdf (May 2014), [Phd Thesis]
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