Home » Publications

Publications

Important Notice: This page contains links to PDF files of articles that may be covered by copyright. You may browse the articles at your convenience. (in the same spirit as you may read a journal or a proceeding article in a public library). Retrieving, copying, or distributing these files, however, may violate the copyright protection law. We recommend that the user abides international law in accessing this directory.

Type Year Author Title
Go to page:
Displaying 551-575 of 1700 result(s).
N.Z.B. Haron, S. Hamdioui, Redundant Residue Number System Code for Fault-Tolerant Hybrid Memories 113_redundant_residue_number_system_code_for_faulttolerant_hybr.pdf (January 2011), ACM Journal on Emerging Technologies in Computing Systems (JETC), volume 7, issue 1 , article 4 [Journal Paper]
D. Ludovici, A. Strano, G.N. Gaydadjiev, D. Bertozzi, Mesochronous NoC Technology for Power-Efficient GALS MPSoCs 114_mesochronous_noc_technology_for_powerefficient_gals_mpsocs.pdf (January 2011), 5th International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip (INA-OCMC 2011), 23 January 2011, Heraklion, Greece [Conference Paper]
M.S. Khan, S. Hamdioui, NBTI-Aware Nanoscaled Circuit Delay Assessment and Mitigation 115_nbtiaware_nanoscaled_circuit_delay_assessment_and_mitigatio.pdf (January 2011), 3rd HiPEAC Workshop on Design for Reliability (DFR 2011), 23 January 2011, Heraklion, Greece [Conference Paper]
Z. Nawaz, Recursive Variable Expansion 116_recursive_variable_expansion.pdf (January 2011), [Phd Thesis]
N.Z.B. Haron, S. Hamdioui, On Correcting Cluster Errors in Nanoelectronic Memories 117_on_correcting_cluster_errors_in_nanoelectronic_memories.pdf (January 2011), 3rd HiPEAC Workshop on Design for Reliability (DFR 2011), 23 January 2011, Heraklion, Greece [Conference Paper]
R.A. Stefan, K.G.W. Goossens, An improved algorithm for slot selection in the Æthereal Network-on-Chip 118_an_improved_algorithm_for_slot_selection_in_the_thereal_ne.pdf (January 2011), 5th International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip (INA-OCMC 2011), 23 January 2011, Heraklion, Greece [Conference Paper]
M.F. Nadeem, S.A. Ostadzadeh, M. Ahmadi, M. Nadeem, S. Wong, A Novel Dynamic Task Scheduling Algorithm for Grid Networks with Reconfigurable Processors (January 2011), 5th HiPEAC Workshop on Reconfigurable Computing (WRC 2011), 23 January 2011, Heraklion, Greece [Conference Paper]
H. Yeh, Hardware Components for Real-Time Stereo Matching: Acceleration of 3D HD TV with FPGAs 120_hardware_components_for_realtime_stereo_matching_accelerat.pdf (January 2011), [Msc Thesis]
Z. Nawaz, M. Nadeem, J. van Someren, K.L.M. Bertels, A parallel FPGA design of the Smith-Waterman traceback 220_a_parallel_fpga_design_of_the_smithwaterman_traceback.pdf (December 2010), International Conference on Field-Programmable Technology (FPT 2010), 8-10 December 2010, Beijing, China [Conference Paper]
F. Gilabert, D. Ludovici, M.E. Gómez, D. Bertozzi, Topology Exploration (December 2010), Book Title "Designing Network-on-Chip Architectures in the Nanoscale Era", Published by CRC Press [Book Chapter]
D. Bertozzi, A. Strano, D. Ludovici, V. Pavlidis, F. Angiolini, M. Krstic, The Synchronization Challenge (December 2010), Book Title "Designing Network-on-Chip Architectures in the Nanoscale Era", Published by CRC Press [Book Chapter]
S. Tzilis, I. Sourdis, G.N. Gaydadjiev, Fine-grain Fault Diagnosis for FPGA Logic Blocks 223_finegrain_fault_diagnosis_for_fpga_logic_blocks.pdf (December 2010), International Conference on Field-Programmable Technology (FPT 2010), 8-10 December 2010, Beijing, China [Conference Paper]
F. Anjam, M. Nadeem, S. Wong, A VLIW Softcore Processor with Dynamically Adjustable Issue-slots 224_a_vliw_softcore_processor_with_dynamically_adjustable_issue.pdf (December 2010), International Conference on Field-Programmable Technology (FPT 2010), 8-10 December 2010, Beijing, China [Conference Paper]
F. Anjam, S. Wong, M.F. Nadeem, A Multiported Register File with Register Renaming for Configurable Softcore VLIW Processors 225_a_multiported_register_file_with_register_renaming_for_confi.pdf (December 2010), International Conference on Field-Programmable Technology (FPT 2010), 8-10 December 2010, Beijing, China [Conference Paper]
T. Marconi, D. Theodoropoulos, K.L.M. Bertels, G.N. Gaydadjiev, A Novel HDL Coding Style to Reduce Power Consumption for Reconfigurable Devices 226_a_novel_hdl_coding_style_to_reduce_power_consumption_for_rec.pdf (December 2010), International Conference on Field-Programmable Technology (FPT 2010), 8-10 December 2010, Beijing, China [Conference Paper]
M. Taouil, S. Hamdioui, E.J. Marinissen, Test Cost Analysis for 3D Die-to-Wafer Stacking 227_test_cost_analysis_for_3d_dietowafer_stacking.pdf (December 2010), 19th IEEE Asian Test Symposium (ATS 2010), 1-4 December 2010, Shanghai, China [Conference Paper]
D. Theodoropoulos, G.K. Kuzmanov, G.N. Gaydadjiev, Minimalistic Architecture for Reconfigurable Audio Beamforming 228_minimalistic_architecture_for_reconfigurable_audio_beamformi.pdf (December 2010), International Conference on Field-Programmable Technology (FPT 2010), 8-10 December 2010, Beijing, China [Conference Paper]
M.F. Nadeem, M. Ahmadi, M. Nadeem, S. Wong, Modeling and Simulation of Reconfigurable Processors in Grid Networks (December 2010), International Conference on ReConFigurable Computing and FPGAs (ReConFig 2010), 13-15 December 2010, Cancun, Mexico [Conference Paper]
D. Theodoropoulos, G.K. Kuzmanov, G.N. Gaydadjiev, A Minimalistic Architecture for Reconfigurable WFS-Based Immersive-Audio 230_a_minimalistic_architecture_for_reconfigurable_wfsbased_imm.pdf (December 2010), International Conference on ReConFigurable Computing and FPGAs (ReConFig 2010), 13-15 December 2010, Cancun, Mexico [Conference Paper]
H. Mushtaq, M. Sabeghi, K.L.M. Bertels, A Runtime Profiler: Toward Virtualization of Polymorphic Computing Platforms 231_a_runtime_profiler_toward_virtualization_of_polymorphic_com.pdf (December 2010), International Conference on ReConFigurable Computing and FPGAs (ReConFig 2010), 13-15 December 2010, Cancun, Mexico [Conference Paper]
Y. Lu, K.L.M. Bertels, G.N. Gaydadjiev, Efficient hardware task reuse and interrupt handling mechanisms for FPGA-based partially reconfigurable systems (December 2010), International Conference on Field-Programmable Technology (FPT 2010), 8-10 December 2010, Beijing, China [Conference Paper]
D. Ludovici, F. Gilabert, M.E. Gómez, G.N. Gaydadjiev, D. Bertozzi, Contrasting Topologies for Regular Interconnection Networks under the Constraints of Nanoscale Silicon Technology 233_contrasting_topologies_for_regular_interconnection_networks.pdf (December 2010), 3rd ACM/IEEE International Workshop on Network-on-Chip Architectures (NoCArc 2010), 4 December 2010, Atlanta, USA [Conference Paper]
M. Nadeem, S. Wong, G.K. Kuzmanov, Configurable, Low-power Design for Inverse Integer Transform in H.264/AVC 234_configurable_lowpower_design_for_inverse_integer_transform.pdf (December 2010), 8th International Conference on Frontiers of Information Technology (FIT 2010), 21-23 December 2010, Islamabad, Pakistan [Conference Paper]
N.Z.B. Haron, S. Hamdioui, Z. Ahyadi, ECC Design for Fault-Tolerant Crossbar Memories: A Case Study 235_ecc_design_for_faulttolerant_crossbar_memories_a_case_stud.pdf (December 2010), 5th IEEE International Design and Test Workshop (IDT 2010), 14-15 December 2010, Abu Dhabi, UAE [Conference Paper]
L. Hasan, Z. Al-Ars, M. Taouil, K.L.M. Bertels, Performance and Bandwidth Optimization for Biological Sequence Alignment 236_performance_and_bandwidth_optimization_for_biological_sequen.pdf (December 2010), 5th IEEE International Design and Test Workshop (IDT 2010), 14-15 December 2010, Abu Dhabi, UAE [Conference Paper]
Go to page: