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Type Year Author Title
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Displaying 501-525 of 1700 result(s).
J.M.P. Cardoso, R. Nane, P. Diniz, Z. Petrov, K Kratky, K.L.M. Bertels, M Hubner, F Goncalves, G. Coutinho, G Constantinides, B Olivier, W. Luk, J.A. Becker, G.K. Kuzmanov, A New Approach to Control and Guide the Mapping of Computations to FPGAs 602_a_new_approach_to_control_and_guide_the_mapping_of_computati.pdf (July 2011), International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'11), 18-21 July 2011, Las Vegas, USA [Conference Paper]
M. Ahmadi, A. Shahbahrami, S. Wong, Collaboration of reconfigurable processors in grid computing: Theory and application 50_collaboration_of_reconfigurable_processors_in_grid_computing.pdf (June 2011), Future Generation Computer Systems (FGCS), volume 27, issue 6 [Journal Paper]
Y. Wang, S.D. Cotofana, A Unified Aging Model of NBTI and HCI Degradation towards Lifetime Reliability Management for Nanoscale MOSFET Circuits 52_a_unied_aging_model_of_nbti_and_hci_degradation_towards_li.pdf (June 2011), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2011), 8-9 June 2011, San Diego, USA [Conference Paper]
M. Beekema, Fault-Tolerant Platform for Intra-Spacecraft Modular Wireless Sensor Network 53_faulttolerant_platform_for_intraspacecraft_modular_wireless.pdf (June 2011), [Msc Thesis]
T. Marconi, Efficient Runtime Management of Reconfigurable Hardware Resources 54_efficient_runtime_management_of_reconfigurable_hardware_resou.pdf (June 2011), [Phd Thesis]
D. Ludovici, Technology Aware Network-on-Chip Connectivity and Synchronization Design 55_technology_aware_networkonchip_connectivity_and_synchroniza.pdf (June 2011), [Phd Thesis]
G.R. Voicu, M. Enachescu, S.D. Cotofana, Towards "Zero-energy" using NEMFET-based Power Management for 3D Hybrid Stacked ICs 56_towards_zeroenergy_using_nemfetbased_power_management_for.pdf (June 2011), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2011), 8-9 June 2011, San Diego, USA [Conference Paper]
A. Azevedo, Efficient Execution of Video Applications on Heterogeneous Multi- and Many-Core Processors 57_efficient_execution_of_video_applications_on_heterogeneous_mu.pdf (June 2011), [Phd Thesis]
O.S. Dragomir, K-loops: Loop Transformations for Reconfigurable Architectures 58_kloops_loop_transformations_for_reconfigurable_architecture.pdf (June 2011), [Phd Thesis]
M. Ahmadi, S. Wong, A Cache Architecture for Counting Bloom Filters: Theory and Application 59_a_cache_architecture_for_counting_bloom_filters_theory_and_a.pdf (June 2011), Journal of Electrical and Computer Engineering, volume 2011 [Journal Paper]
R. Nane, V.M. Sima, J. van Someren, K.L.M. Bertels, DWARV: A HDL Compiler with Support for Scheduling Custom IP Blocks 737_dwarv_a_hdl_compiler_with_support_for_scheduling_custom_ip.pdf (June 2011), 48th Design Automation Conference (DAC 2011), 5-10 June 2011, San Diego, USA , WIP poster session [Conference Paper]
D. Andrade, A. Rubio, A. Calomarde, S.D. Cotofana, Analysis of delay mismatching of digital circuits caused by common environmental fluctuations (May 2011), IEEE International Symposium on Circuits and Systems (ISCAS 2011), 15-18 May, 2011, Rio de Janeiro, Brazil [Conference Paper]
S. Isaza Ramirez, F. Sanchez, F. Cabarcas, A. Ramirez, G.N. Gaydadjiev, Parametrizing Multicore Architectures for Multiple Sequence Alignment 60_parametrizing_multicore_architectures_for_multiple_sequence_a.pdf (May 2011), ACM International Conference on Computing Frontiers (CF 2011), 3-5 May 2011, Ischia, Italy [Conference Paper]
I.S. Irobi, Z. Al-Ars, S. Hamdioui, Memory Test Optimization for Parasitic Bit Line Coupling in SRAMs 61_memory_test_optimization_for_parasitic_bit_line_coupling_in_s.pdf (May 2011), 16th IEEE European Test Symposium (ETS 2011), 23-27 May 2011, Trondheim, Norway [Conference Paper]
C. Gou, G.N. Gaydadjiev, Elastic Pipeline: Addressing GPU On-chip Shared Memory Bank Conflicts 62_elastic_pipeline_addressing_gpu_onchip_shared_memory_bank_c.pdf (May 2011), ACM International Conference on Computing Frontiers (CF 2011), 3-5 May 2011, Ischia, Italy , Acceptance rate: 18.2% (22/121), Best paper award nomination [Conference Paper]
M. Taouil, S. Hamdioui, Layer Redundancy Based Yield Improvement for 3D Wafer-to-Wafer Stacked Memories (May 2011), 16th IEEE European Test Symposium (ETS 2011), 23-27 May 2011, Trondheim, Norway [Conference Paper]
D. Theodoropoulos, Custom Architecture for Immersive-Audio Applications 64_custom_architecture_for_immersiveaudio_applications.pdf (May 2011), [Phd Thesis]
J.A. Ambrose, A.M. Molnos, A.T. Nelson, S.D. Cotofana, K.G.W. Goossens, B.H.H. Juurlink, Composable Local Memory Organisation for Streaming Applications on Embedded MPSoCs 65_composable_local_memory_organisation_for_streaming_applicatio.pdf (May 2011), ACM International Conference on Computing Frontiers (CF 2011), 3-5 May 2011, Ischia, Italy [Conference Paper]
D. Theodoropoulos, G.K. Kuzmanov, G.N. Gaydadjiev, Multi-core Platforms for Beamforming and Wave Field Synthesis 66_multicore_platforms_for_beamforming_and_wave_field_synthesis.pdf (April 2011), IEEE Transactions on Multimedia (TMM), volume 23, issue 2 [Journal Paper]
M. Taouil, S. Hamdioui, E.J. Marinissen, How significant will be the test cost share for 3D Die-to-Wafer stacked-ICs? (April 2011), 6th International conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS 2011), 6-8 April 2011, Athens, Greece [Conference Paper]
M. Nadeem, S. Wong, G.K. Kuzmanov, An Efficient Hardware Design for Intra-prediction in H.264/AVC Decoder 68_an_efficient_hardware_design_for_intraprediction_in_h264av.pdf (April 2011), Saudi International Electronics, Communications and Photonics Conference (SIECPC 2011), 24-26 April 2011, Riyadh, Saudi Arabia [Conference Paper]
C. Gou, G.N. Gaydadjiev, Exploiting SPMD Horizontal Locality 69_exploiting_spmd_horizontal_locality.pdf (April 2011), IEEE Computer Architecture Letters, volume 10, issue 1 [Journal Paper]
M. Taouil, S. Hamdioui, Stacking Order Impact on Overall 3D Die-to-Wafer Stacked-IC Cost (April 2011), 14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2011), 13-14 April 2011, Cottbus, Germany [Conference Paper]
I.S. Irobi, Z. Al-Ars, S. Hamdioui, M. Renovell, Influence of Parasitic Memory Effect on Single-Cell Faults in SRAMs 71_influence_of_parasitic_memory_effect_on_singlecell_faults_in.pdf (April 2011), 14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2011), 13-14 April 2011, Cottbus, Germany [Conference Paper]
A.J. van de Goor, H. Kukner, S. Hamdioui, Optimizing Memory BIST Address Generator Implementations 72_optimizing_memory_bist_address_generator_implementations.pdf (April 2011), 6th International conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS 2011), 6-8 April 2011, Athens, Greece , Best Paper Award [Conference Paper]
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