Publications

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Type Year Author Title
Displaying 1376-1400 of 1682 result(s).
P.T. Groen, P. Hamalainen, B.H.H. Juurlink, T.D. Hamalainen, Accelerating the Secure Remote Password Protocol Using Reconfigurable Hardware 941_accelerating_the_secure_remote_password_protocol_using_recon.pdf (April 2004), 1st ACM International Conference on Computing Frontiers (CF 2004), 14-16 April 2004, Ischia, Italy [Conference Paper]
P.T. Stathis, D. Cheresiz, S. Vassiliadis, B.H.H. Juurlink, Sparse Matrix Transpose Unit 942_sparse_matrix_transpose_unit.pdf (April 2004), 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 26-30 April 2004, Santa Fe, USA [Conference Paper]
G.K. Kuzmanov, G.N. Gaydadjiev, S. Vassiliadis, The MOLEN Processor Prototype 943_the_molen_processor_prototype.pdf (April 2004), 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 20-23 April 2004, Napa, USA [Conference Paper]
Z. Al-Ars, S. Hamdioui, A.J. van de Goor, Effects of Bit Line Coupling on the Faulty Behavior of DRAMs 944_effects_of_bit_line_coupling_on_the_faulty_behavior_of_drams.pdf (April 2004), 22nd IEEE VLSI Test Symposium (VTS 2004), 25-29 April 2004, Napa, USA [Conference Paper]
M. Sima, The ρ–TriMedia Processor 947_the_trimedia_processor.pdf (March 2004), [Phd Thesis]
S. Hamdioui, Testing Static Random Access Memories (March 2004), Published by Kluwer Academic Publishers [Book]
T. Niculiu, M. Ciuc, S.D. Cotofana, Hierarchical Models for Intelligent Reconfigurable Simulation (March 2004), 15th IASTED International Conference on Modelling and Simulation (MS 2004), 1-3 March 2004, Marina del Rey, USA [Conference Paper]
A.M. Molnos, M.J.M. Heijligers, S.D. Cotofana, J.T.J. van Eijndhoven, Compositional Memory Systems for Data Intensive Applications 952_compositional_memory_systems_for_data_intensive_applications.pdf (February 2004), Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France [Conference Paper]
D. Crisu, S.D. Cotofana, S. Vassiliadis, P. Liuha, GRAAL - A Development Framework for Embedded Graphics Accelerators 953_graal__a_development_framework_for_embedded_graphics_accele.pdf (February 2004), Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France [Conference Paper]
Z. Al-Ars, A.J. van de Goor, Soft Faults and the Importance of Stresses in Memory Testing 954_soft_faults_and_the_importance_of_stresses_in_memory_testing.pdf (February 2004), Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France [Conference Paper]
P. Celinski, S.F. Al-Sarawi, D. Abbott, S.D. Cotofana, S. Vassiliadis, Logical Effort Based Design Exploration of 64-bit Adders Using a Mixed Dynamic-CMOS/Threshold-Logic Approach 955_logical_effort_based_design_exploration_of_64bit_adders_usi.pdf (February 2004), IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 19-20 February 2004, Lafayette, USA [Conference Paper]
S. Wong, S. Vassiliadis, S.D. Cotofana, Future Directions of Programmable and Reconfigurable Embedded Processors 998_future_directions_of_programmable_and_reconfigurable_embedde.pdf (January 2004), Book Title "Domain-Specific Processors: Systems, Architectures, Modeling and Simulation", Published by Marcel Dekker Inc. [Book Chapter]
T. Niculiu, C. Aktouf, S.D. Cotofana, Hierarchical Testability Assisted Intelligent Simulation (January 2004), International Journal of Modelling and Simulation, volume 24, issue 1 [Journal Paper]
D. Cheresiz, B.H.H. Juurlink, S. Vassiliadis, H.A.G. Wijshoff, Implementation of a Streaming Execution Unit 1049_implementation_of_a_streaming_execution_unit.pdf (December 2003), Journal of Systems Architecture - Embedded System Design (JSA), volume 49, issue 12-15 [Journal Paper]
C.R. Lageweg, S.D. Cotofana, S. Vassiliadis, Evaluation Methodology for Single Electron Encoded Threshold Logic Gates 1050_evaluation_methodology_for_single_electron_encoded_threshol.pdf (December 2003), International Conference on Very Large Scale Integration of System-on-Chip (VLSI-SoC 2003), 1-3 December 2003, Darmstadt, Germany [Conference Paper]
G.L. Reijns, A.J.C. van Gemund, H. Gautama, On the Use of Pierson Distributions for the Performance Prediction of Parallel Programs (December 2003), Symposium on Performance Evaluation - Stories and Perspectives, 5-6 December 2003, Vienna, Austria [Conference Paper]
T. Niculiu, S.D. Cotofana, Hierarchical Templates for Simulated Intelligence 1052_hierarchical_templates_for_simulated_intelligence.pdf (December 2003), Simulation News Europe (SNE), issue 38/39 [Journal Paper]
P.J. de Langen, B.H.H. Juurlink, Reducing Conflict Misses in Caches 1053_reducing_conflict_misses_in_caches.pdf (November 2003), 14th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2003), 27-29 November 2003, Veldhoven, The Netherlands [Conference Paper]
W. Lu, S. Wong, A Fast CRC Update Implementation 1054_a_fast_crc_update_implementation.pdf (November 2003), 14th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2003), 27-29 November 2003, Veldhoven, The Netherlands [Conference Paper]
E. Moscu Panainte, K.L.M. Bertels, S. Vassiliadis, PowerPC compiler Backend for the Molen Programming Paradigm 1055_powerpc_compiler_backend_for_the_molen_programming_paradigm.pdf (November 2003), 14th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2003), 27-29 November 2003, Veldhoven, The Netherlands [Conference Paper]
B.H.H. Juurlink, K.L.M. Bertels, B. Li, A Flexible Simulator of Pipelined Processors 1056_a_flexible_simulator_of_pipelined_processors.pdf (November 2003), 14th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2003), 27-29 November 2003, Veldhoven, The Netherlands [Conference Paper]