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Type Year Author Title
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Displaying 376-400 of 1700 result(s).
Y. Wang, M. Enachescu, S.D. Cotofana, L. Fang, Variation tolerant on-chip degradation sensors for dynamic reliability management systems 1310_variation_tolerant_onchip_degradation_sensors_for_dynamic.pdf (September 2012), Microelectronics Reliability, volume 52, issue 9-10 [Journal Paper]
B. Spinean, G.N. Gaydadjiev, Implementation Study of FFT on Multi-Lane Vector Processors 1320_implementation_study_of_fft_on_multilane_vector_processors.pdf (September 2012), 15th Euromicro Conference on Digital System Design (DSD 2012), 5-8 September 2012, Izmir, Turkey [Conference Paper]
G.R. Voicu, M. Enachescu, S.D. Cotofana, A 3D Stacked High Performance Scalable Architecture for 3D Fourier Transform 1592_a_3d_stacked_high_performance_scalable_architecture_for_3d.pdf (September 2012), 30th IEEE International Conference on Computer Design (ICCD 2012), 30 September - 3 October 2012, Montreal, Canada [Conference Paper]
G. Thomas, K. Chandrasekar, B. Akesson, B.H.H. Juurlink, K.G.W. Goossens, A Predictor-based Power-Saving Policy for DRAM Memories 145_a_predictorbased_powersaving_policy_for_dram_memories.pdf (September 2012), 15th Euromicro Conference on Digital System Design (DSD 2012), 5-8 September 2012, Izmir, Turkey [Conference Paper]
A.F.C. van den Berg, Fault-Tolerant On-Board Computer Software for the Del fi-n3Xt Nanosatellite 1301_faulttolerant_onboard_computer_software_for_the_delfin3.pdf (August 2012), [Msc Thesis]
N. Aymerich, S.D. Cotofana, A. Rubio, Degradation Stochastic Resonance (DSR) in AD-AVG Architectures 1327_degradation_stochastic_resonance_dsr_in_adavg_architectu.pdf (August 2012), 12th IEEE Conference on Nanotechnology (IEEE NANO 2012), 20-23 August 2012, Birmingham, UK , Best PhD Student Paper Award [Conference Paper]
M. Taouil, S. Hamdioui, Yield Improvement for 3D Wafer-to-Wafer Stacked Memories 1341_yield_improvement_for_3d_wafertowafer_stacked_memories.pdf (August 2012), Journal of Electronic Testing: Theory and Applications (JETTA), volume 28 , issue 4 [Journal Paper]
R. Nane, V.M. Sima, B Olivier, R.J. Meeuws, Y.D. Yankova, K.L.M. Bertels, DWARV 2.0: A CoSy-based C-to-VHDL Hardware Compiler 600_dwarv_20_a_cosybased_ctovhdl_hardware_compiler.pdf (August 2012), 22nd International Conference on Field Programmable Logic and Applications (FPL 2012), 29-31 August 2012, Oslo, Norway [Conference Paper]
C. Papameletis,, esign-for-Testability Automation for 3D Stacked ICs (August 2012), [Msc Thesis]
C. Gou, G.N. Gaydadjiev, Addressing GPU On-chip Shared Memory Bank Conflicts Using Elastic Pipeline 1292_addressing_gpu_onchip_shared_memory_bank_conflicts_using_e.pdf (July 2012), International Journal of Parallel Programming (IJPP) , on-line first [Journal Paper]
C.B. Ciobanu, G.K. Kuzmanov, G.N. Gaydadjiev, On Implementability of Polymorphic Register Files 1293_on_implementability_of_polymorphic_register_files.pdf (July 2012), 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2012), 9-11 July 2012, York, UK [Conference Paper]
Y. Wang, S.D. Cotofana, L. Fang, Statistical Reliability Analysis of NBTI Impact on FinFET SRAMs and Mitigation Technique Using Independent-Gate Devices 1294_statistical_reliability_analysis_of_nbti_impact_on_finfet_s.pdf (July 2012), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2012), 4-6 July 2012, Amsterdam, The Netherlands [Conference Paper]
M. Shahsavari, Z. Al-Ars, K.L.M. Bertels, Evaluation of Different Task Scheduling Policies in Multi-Core Systems with Reconfigurable Hardware 1295_evaluation_of_different_task_scheduling_policies_in_multic.pdf (July 2012), 8th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES 2012), 8-14 July 2012, Fiuggi, Italy [Conference Paper]
S. Safiruddin, M. Lefter, D. Borodin, G.R. Voicu, S.D. Cotofana, Zero-Performance-Overhead Online Fault Detection and Diagnosis in 3D Stacked Integrated Circuits 1308_zeroperformanceoverhead_online_fault_detection_and_diagno.pdf (July 2012), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2012), 4-6 July 2012, Amsterdam, The Netherlands [Conference Paper]
S. Safiruddin, F. Peper, S.D. Cotofana, Stigmergic Search with Single Electron Tunneling Technology based Memory Enhanced Hubs 1309_stigmergic_search_with_single_electron_tunneling_technology.pdf (July 2012), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2012), 4-6 July 2012, Amsterdam, The Netherlands , Best PhD Student Paper Award [Conference Paper]
N. Cucu Laurenciu, S.D. Cotofana, A Markovian, Variation-Aware Circuit-Level Aging Model 1317_a_markovian_variationaware_circuitlevel_aging_model.pdf (July 2012), IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2012), 4-6 July 2012, Amsterdam, The Netherlands [Conference Paper]
N. Aymerich, S.D. Cotofana, A. Rubio, Adaptive Fault-Tolerant Architecture for Unreliable Technologies with Heterogenous Variability 1326_adaptive_faulttolerant_architecture_for_unreliable_technol.pdf (July 2012), IEEE Transactions on Nanotechnology (TNANO), volume 11, issue 4 [Journal Paper]
R.J. Meeuws, Quantitative Hardware Prediction Modeling for Hardware/Software Co-design 883_quantitative_hardware_prediction_modeling_for_hardwaresoftw.pdf (July 2012), [Phd Thesis]
I. Ashraf, S.A. Ostadzadeh, R.J. Meeuws, K.L.M. Bertels, Communication-aware HW/SW Co-design for Heterogeneous Multicore Platforms 143_communicationaware_hwsw_codesign_for_heterogeneous_multic.pdf (July 2012), 10th International Workshop on Dynamic Analysis (WODA 2012), 15 July 2012, Minneapolis, USA [Conference Paper]
F. Anjam, L. Carro, S. Wong, G.L. Nazar, M.B. Rutzig, Simultaneous Reconfiguration of Issue-width and Instruction Cache for a VLIW Processor 144_simultaneous_reconfiguration_of_issuewidth_and_instruction.pdf (July 2012), International Conference on Embedded Computer Systems: Architecture Modeling and Simulation (IC-SAMOS 2012), 16-19 July 2012, Samos, Greece [Conference Paper]
G Smaragdos, An Adaptive Defect-Tolerant Multiprocessor Array Architecture 445_an_adaprive_defecttolerant_multiprocessor_array.pdf (July 2012), [Msc Thesis]
M.S. Khan, S. Hamdioui, Analyzing Combined Impacts of Parameter Variations and BTI in Nano-scale Logical Gates 1297_analyzing_combined_impacts_of_parameter_variations_and_bti.pdf (June 2012), 1st Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2012), 1 June 2012, Annecy, France [Conference Paper]
B.H.H. Juurlink, M. Alvarez, C.C. Chi, A. Azevedo, C.H. Meenderinck, A. Ramirez, Scalable Parallel Programming Applied to H.264/AVC Decoding (June 2012), Published by Springer [Book]
N. Khammassi, J.C. Le Lann, J.Ph. Diguet, A. Skrzyniarz, MHPM: Multi-Scale Hybrid Programming Model: A Flexible Parallelization Methodology (June 2012), IEEE International Conference on High Performance Computing (HPCC 2012), 25-27 June 2012, Liverpool, United Kindom , Liverpool, UK [Conference Proceedings]
R. Amarnath, Techniques for Memory Mapping on Multi-Core Automotive Embedded Systems 1405_techniques_for_memory_mapping_on_multicore_automotive_embe.pdf (June 2012), [Msc Thesis]
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