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Type Year Author Title
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Displaying 301-325 of 1700 result(s).
A. Beyranvand Nejad, A.M. Molnos, K.G.W. Goossens, A Software-Based Technique Enabling Composable Hierarchical Preemptive Scheduling for Time-Triggered Applications 1355_a_softwarebased_technique_enabling_composable_hierarchical.pdf (August 2013), 19th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2013), 19-21 August 2013, Taipei, Taiwan [Conference Paper]
M.F. Nadeem, Evaluation Framework for Task Scheduling Algorithms in Distributed Reconfigurable Systems 1375_evaluation_framework_for_task_scheduling_algorithms_in_dist.pdf (August 2013), , Distributed computing, simulation framework, scheduling, resource management [Phd Thesis]
F. Anjam, Run-time Adaptable VLIW Processors -- Resources, Performance, Power Consumption, and Reliability Trade-offs 1376_runtime_adaptable_vliw_processors__resources_performanc.pdf (August 2013), [Phd Thesis]
R.S. Aithal, Process Algebraic - Performance Modeling of Embedded Software 1379_process_algebraic__performance_modeling_of_embedded_softwa.pdf (August 2013), [Msc Thesis]
I. Ashraf, S.A. Ostadzadeh, R.J. Meeuws, K.L.M. Bertels, Evaluation Methodology for Data Communication-aware Application Partitioning 1380_evaluation_methodology_for_data_communicationaware_applica.pdf (August 2013), 1st Workshop on Runtime and Operating Systems for the Many-core Era (ROME 2013), 26 August 2013, Aachen, Germany , http://dx.doi.org/10.1007/978-3-642-54420-0_72 [Conference Paper]
T. Marconi, Online scheduling and placement of hardware tasks with multiple variants on dynamically reconfigurable field-programmable gate arrays 1384_online_scheduling_and_placement_of_hardware_tasks_with_mult.pdf (August 2013), Computers and Electrical Engineering [Journal Paper]
H.A. Du Nguyen, GPU-Based Simulation of Brain Neuron Models 1407_gpubased_simulation_of_brain_neuron_models.pdf (August 2013), [Msc Thesis]
M. Masadeh, Interconnect Test for 3D Stacked Memories (August 2013), [Msc Thesis]
G.E. Verdugo Sanchez, Libswift-PPSPP Information Centric Router: SHA1 Accelerator 1424_libswiftppspp_information_centric_router_sha1_accelerator.pdf (August 2013), [Msc Thesis]
R Nobre, J.M.P. Cardoso, B Olivier, R. Nane, L Fitzpatrick, J G de F. Coutinho, J. van Someren, V.M. Sima, K.L.M. Bertels, P. Diniz, Hardware/Software Compilation (August 2013), Book Title "Compilation and Synthesis for Embedded Reconfigurable Systems: An Aspect-Oriented Approach", Published by Springer [Book Chapter]
T. Marconi, K.L.M. Bertels, G.N. Gaydadjiev, A Novel Productivity-Driven Logic Element for Field-Programmable Devices 1343_a_novel_productivitydriven_logic_element_for_fieldprogram.pdf (July 2013), International Journal of Electronics (IJE) [Journal Paper]
G.R. Voicu, S.D. Cotofana, Towards Heterogenous 3D-Stacked Reliable Computing with von Neumann Multiplexing 1369_towards_heterogenous_3dstacked_reliable_computing_with_von.pdf (July 2013), 9th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH 2013), July 15-17, 2013, New York City, USA [Conference Paper]
G. Keramidas, S. Wong, F. Anjam, A.A.C. Brandon, R.A.E. Seedorf, C. Scordino, L. Carro, D. Matos, R. Giorgi, S. Kavvadias, S.A. McKee, B. Goel, V. Spiliopoulos, Embedded Reconfigurable Computing: the ERA Approach 1381_embedded_reconfigurable_computing_the_era_approach.pdf (July 2013), 11th IEEE International Conference on Industrial Informatics (INDIN 2013), 29-31 July 2013, Bochum, Germany [Conference Paper]
A. Pattabiraman, Experimental Wind Flow Studies For Development and Calibration Of Thermal Models For Photovoltaic Cells (July 2013), [Msc Thesis]
R. Ferreira, V. Duarte, W. Meireles, M Pereira, L. Carro, S. Wong, A Just-In-Time Modulo Scheduling for Virtual Coarse-Grained Reconfigurable Architectures 1428_a_justintime_modulo_scheduling_for_virtual_coarsegrained.pdf (July 2013), International Conference on Embedded Computer Systems: Architecture Modeling and Simulation (IC-SAMOS 2013), 15-18 July 2013, Samos, Greece [Conference Paper]
J. de Sonneville, K.J. van der Kolk, W. Veneman, R. Lodder, Z. Al-Ars, H. Spaink, Analysing RNA-seq data using GeneTiles 1432_analysing_rnaseq_data_using_genetiles.pdf (July 2013), European Zebrafish Meeting (EZM 2013), 9-13 July 2013, Bercelona, Spain [Conference Paper]
G.R. Voicu, M. Lefter, M. Enachescu, S.D. Cotofana, 3D Stacked Wide-Operand Adders: A Case Study 1586_3d_stacked_wideoperand_adders_a_case_study.pdf (June 2013), 24th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2013), 5-7 June 2013, Washington D.C., USA [Conference Paper]
E.K. Bankas, K.A. Gbolagade, S.D. Cotofana, An Effective New CRT Based Reverse Converter for a Novel Moduli Set { 2^(2n+1)-1, 2^(2n+1), 2^(2n)-1 } 1588_an_effective_new_crt_based_reverse_converter_for_a_novel_mo.PDF (June 2013), 24th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2013), 5-7 June 2013, Washington D.C., USA [Conference Paper]
K. Chandrasekar, C. Weis, B. Akesson, N. Wehn, K.G.W. Goossens, Towards Variation-Aware System-Level Power Estimation of DRAMs: An Empirical Approach 1342_towards_variationaware_systemlevel_power_estimation_of_dr.pdf (June 2013), 50th Design Automation Conference (DAC 2013), 2-6 June 2013, Austin, USA , HiPEAC Paper Award [Conference Paper]
A.M.M.O. Cortez, V. van der Leest, R. Maes, G.J. Schrijen, S. Hamdioui, Adapting Voltage Ramp-up Time for Temperature Noise Reduction on Memory-based PUFs 1345_adapting_voltage_rampup_time_for_temperature_noise_reducti.pdf (June 2013), IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2013), 2-3 June 2013, Austin, USA [Conference Paper]
S. M. Alavi, G.R. Voicu, R. B. Staszewski, L. C. de Vreede, J.R. Long, A 2x13-bit All-Digital I/Q RF-DAC in 65-nm CMOS (June 2013), IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2013), 2-4 June 2013, Seattle, USA , Best Student Paper Award - 2nd Place [Conference Proceedings]
L Petrica, V Codreanu, S.D. Cotofana, VASILE: A Reconfigurable Vector Architecture for Instruction Level Frequency Scaling 1367_vasile_a_reconfigurable_vector_architecture_for_instructio.pdf (June 2013), 12th IEEE Low Voltage Low Power Conference (FTFC 2013), 20-21 June 2013, Paris, France [Conference Paper]
C Bira, L Gugu, R Hobincu, V Codreanu, L Petrica, S.D. Cotofana, An Energy Effective SIMD Accelerator for Visual Pattern Matching 1368_an_energy_effective_simd_accelerator_for_visual_pattern_mat.pdf (June 2013), 4th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 2013), 13-14 June 2013, Edinburgh, Scotland [Conference Paper]
C. Pham-Quoc, Z. Al-Ars, K.L.M. Bertels, Heterogeneous Hardware Accelerators Interconnect: An Overview 1371_heterogeneous_hardware_accelerators_interconnect_an_overvi.pdf (June 2013), NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2013), 25-27 June 2013, Torino, Italy [Conference Paper]
D. Mirzoyan, B. Akesson, K.G.W. Goossens, Process-Variation Aware Mapping of Best-Effort and Real-Time Streaming Applications to MPSoCs 1390_processvariation_aware_mapping_of_besteffort_and_realtim.pdf (June 2013), ACM Transactions on Embedded Computing Systems (TECS) [Journal Paper]
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